mirror of https://github.com/m-labs/artiq.git
spi: fix typo in doc
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@ -95,7 +95,7 @@ class SPIMaster:
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def set_config(self, flags=0, write_freq=20*MHz, read_freq=20*MHz):
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"""Set the configuration register.
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* If ``config.cs_polarity`` == 0 (```cs`` active low, the default),
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* If ``config.cs_polarity`` == 0 (``cs`` active low, the default),
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"``cs_n`` all deasserted" means "all ``cs_n`` bits high".
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* ``cs_n`` is not mandatory in the pads supplied to the gateware core.
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Framing and chip selection can also be handled independently
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