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artiq
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989 Commits (master)

Author SHA1 Message Date
Florian Agbuya a8157cd5c9 enable dynamic address configuration in Kasli I2C EEPROM 
Signed-off-by: Florian Agbuya <fa@m-labs.ph>
 2024-05-07 12:07:37 +08:00
Norman Krackow baa58343ac
urukul: fix `tune_sync_delay()` (#2374) 2024-04-12 09:03:17 +08:00
morgan 609684664a coredevice schema: add enable_wrpll option to json 2024-03-11 16:42:20 +08:00
Simon Renblad 27178c1478 moninj: remove CancelledError workaround 2024-03-07 12:10:05 +08:00
Simon Renblad e56331248e dashboard: fix device subscriber connections 2024-03-06 18:09:12 +08:00
Simon Renblad a21805598a dashboard fix moninj, analyzer clients 2024-02-27 11:25:43 +08:00
Sébastien Bourdeauducq 716d0f556d grabber: timeout fixes 2024-02-26 11:03:59 +08:00
Charles Baynham 20d7604f87 grabber: Add optional timeout for getting grabber data 
Signed-off-by: Charles Baynham <c.baynham@imperial.ac.uk>
 2024-02-26 11:02:02 +08:00
Simon Renblad c49600a2fc docs: fix sampler, waveform 2024-02-23 10:56:19 +08:00
Simon Renblad 779b7704ed waveform, comm_analyzer add cursor label unit 2024-02-20 15:53:01 +08:00
Simon Renblad 1b0fd2e2d3 comm_analyzer: remove interval, timestamp 2024-02-19 17:37:08 +08:00
morgan fc282d4e17 artiq_ddb_template: fix clk_div config 
remove clk_div default in jsonschema
set CLK IN divided by 1 as default when bypassing PLL
 2024-02-16 15:23:55 +08:00
Simon Renblad 795b8ae4c6 add analyzer proxy magic 2024-02-16 14:48:49 +08:00
Simon Renblad d085c1e4a4 waveform, analyzer proxy fix connect errors 2024-02-16 14:48:49 +08:00
Simon Renblad 720cbb4490 comm_analyzer, waveform add ndecimals 2024-02-15 15:46:12 +08:00
Simon Renblad efb8aaf9f9 comm_analyzer: fix stopped_x 2024-02-15 15:32:00 +08:00
mwojcik 7fee68ede0 subkernel messages: check for send/recv pairs 2024-02-01 18:56:07 +08:00
mwojcik 0ba0330b53 compiler: support free subkernel message passing 2024-01-31 11:46:07 +08:00
Simon Renblad 12a44fad3c comm_analyzer: change usage of logs field 2024-01-22 15:39:11 +08:00
Simon Renblad e393b3ab37 comm_analyzer: add set_end_time call 2024-01-15 13:39:06 +08:00
Simon Renblad 3af4c9d517 comm_analyzer: add get_channel_list 2024-01-13 00:07:42 +08:00
Simon Renblad 64567bc26f comm_analyzer: add AnalyzerProxyReceiver 2024-01-13 00:06:14 +08:00
Simon Renblad b215df2d25 comm_analyzer: add WaveformManager, WaveformChannel 2024-01-10 16:02:04 +08:00
mwojcik 4956fac861 satman: allow subkernels start subkernels 2024-01-09 08:44:45 +08:00
Sebastien Bourdeauducq 413d33c3d1 core: document analyzer proxy options 2023-12-13 14:29:33 +08:00
Sebastien Bourdeauducq c2b53ecb43 core: add option to trigger analyzer proxy at run end 2023-12-13 14:27:48 +08:00
Sebastien Bourdeauducq 402a5d3376 core: connect lazily to analyzer proxy 
Otherwise artiq_compile and other uses of Core that does not access hardware/network may fail.
 2023-12-13 13:46:47 +08:00
Sebastien Bourdeauducq 7a863b4f5e core: add trigger_analyzer_proxy API 2023-12-13 13:08:54 +08:00
mwojcik 49267671f9 core: fix precompile 2023-12-04 12:10:11 +08:00
mwojcik 1a28069aa2 support for pre-compiling subkernels 2023-11-23 16:49:02 +08:00
linuswck 93c9d8bcdf artiq_ddb_template:set default Shuttler drtio_dest 
- remove default Shuttler "drtio_destination" value in jsonschema
- set the default Shuttler "drtio_destination" value according to
    board "target" and "hw_rev"
 2023-10-27 21:46:02 +02:00
mwojcik e480bbe8d8 artiq_ddb_template: move satellite_cpu_target to core 2023-10-27 21:45:12 +02:00
mwojcik 5f445f6b92 ad53xx: fix `load()` references in documentation 2023-10-16 13:54:38 +08:00
mwojcik 973fd88b27 core: compile and upload subkernels 2023-10-08 17:11:51 +08:00
Sebastien Bourdeauducq 0131a8bef2 shuttler: cleanup 2023-10-06 14:55:51 +08:00
occheung a772dee1cc shuttler: change 0th order accumulator width 
It now truncates the LSBs instead of the MSBs.
 2023-09-29 10:09:39 +08:00
mwojcik 0e8aa33979 core: separate master target from compilation 2023-09-28 10:41:55 +08:00
linuswck 0c1b572872 Shuttler: Correct spelling and grammar in docs 2023-09-27 17:29:16 +08:00
linuswck ab0d4c41c3 Shuttler: pdq, efc->shuttler pdq_words->coef_words 2023-09-27 17:29:16 +08:00
occheung b7b8f0efa2
Generate coredevice entries for Shuttler (#2216) 
* ddb: generate shuttler coredevice entries

* ddb: split-off all DRTIO-over-EEM peripherals

Only EFC uses DRTIO-over-EEM at this moment. It will be relevant to phaser-DRTIO in the future.

* ddb: generalize efc processing into drtio-over-eem peripherals

* ddb: check DRTIO role validity before processing
 2023-09-26 09:44:21 +08:00
occheung 73ab71f443
shuttler: add documentation 2023-09-25 17:47:47 +08:00
occheung 5c64eac8d2 relay: fix naming 2023-09-19 18:49:20 +08:00
occheung 477a7b693c remove debug for converter 2023-09-19 18:49:20 +08:00
occheung f2694f25eb re-impl ADC using general access methods 2023-09-19 18:49:20 +08:00
occheung 9e1447d104 adc: implement standby & power-down/up 2023-09-19 18:49:20 +08:00
occheung 870020bc9f adc: use a generous upper bound 2023-09-19 18:49:20 +08:00
occheung c2d136f669 shuttler: reorg SPI constants 2023-09-19 18:49:20 +08:00
occheung 06426e0ed9 shuttler: impl general reg access 2023-09-19 18:49:20 +08:00
occheung e443e06e62 shuttler: remove adc calibrate debug lines 2023-09-19 18:49:20 +08:00
occheung 55150ebdbb shuttler: fix calibration channel target 2023-09-19 18:49:20 +08:00