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Author SHA1 Message Date
Leon Riesebos c4292770f8
Kasli JSON description for SPI over DIO cards (#1800) 2022-02-26 07:36:00 +08:00
Sebastien Bourdeauducq 2b918ac6f7 coredevice: merge pcf8574a into i2c 2022-02-25 19:01:14 +08:00
Robert Jördens c8b9eed9c9 fastino: add comments about sideeffects on v0.1 2022-02-16 14:42:22 +00:00
Robert Jördens 08b65470cd fastino: robustify init() 
* init() now also clear and resets more state including the interpolators.
  If not done, this PLL unlocks/locks may lead to random interpolator state
  on boot to which the CICs react badly.
* Use and expose `t_frame`
* Clarify implementation state of `read()`
 2022-02-16 14:34:22 +00:00
occheung a74196aa27 mirny: allow set attenuation with dB 2022-02-07 14:22:52 +08:00
Steve Fan 798a412c6f
comm_moninj: set keepalive for socket (#1843) 2022-02-04 13:51:19 +08:00
Sebastien Bourdeauducq ee511758ce fix typo 2022-01-26 07:51:35 +08:00
pca006132 ba34700798 coredevice: report nested exceptions 2022-01-26 07:16:54 +08:00
pca006132 4644e105b1 compiler: modified exception representation 
Exception name is replaced by exception ID, which requires no
allocation. Other strings in the exception can now be 'host-only'
strings, which is represented by a CSlice with len = usize::MAX and
ptr = key, to avoid the need for allocation when raising exceptions
through RPC.
 2022-01-26 07:16:54 +08:00
Steve Fan 3f812c4c2c
comm_kernel: fix RPC exception handling (#1801) 2022-01-12 15:23:37 +08:00
Steve Fan de5892a00a
comm_kernel: check if elements are within bounds for RPC list (#1824) 2022-01-11 17:16:45 +08:00
Steve Fan d7dd75e833 comm_kernel: fix off-by-one error for numeric value range check 2022-01-11 10:13:42 +08:00
Spaqin 095fb9e333
add Almazny support (#1780) 2022-01-11 09:55:39 +08:00
occheung 8b45f917d1 urukul: use default profile 2022-01-10 16:21:39 +08:00
Peter Drmota 7c664142a5
Simplified use of the AD9910 RAM feature (#1584) 
* coredevice: Change Urukul default single-tone profile to 7

This allows using the internal profile control in RAM modulation mode (which always starts to play back at profile 0) without competing for the content of the profile 0 register used in single tone mode.

Signed-off-by: Peter Drmota <peter.drmota@physics.ox.ac.uk>

* ad9910/set_mu: comment on caveats when setting register

* ad9910: avoid unnecessary write/param

Credit: Solution proposed by @pmldrmota in https://github.com/m-labs/artiq/pull/1584#issuecomment-987774353

* revert 1064fdff (`set_mu()` comments)

158a7be7 had addressed this issue.

Co-authored-by: occheung <dc@m-labs.hk>
 2021-12-13 23:44:03 +08:00
Leon Riesebos 7ffe4dc2e3 coredevice: set default pow for ad9912 set_mu() 2021-12-06 12:34:55 +08:00
Leon Riesebos 9e3ea4e8ef coredevice: fixed type annotations for AD9910 2021-12-06 12:34:55 +08:00
Steve Fan 4a6bea479a
Host report for async error upon kernel termination (#1791) 
Closes #1644
 2021-12-04 13:33:24 +08:00
Etienne Wodey 9f830b86c0
kasli: add SED lanes count option to HW description JSON file (#1745) 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-12-03 17:05:35 +08:00
Peter Drmota 20e079a381
AD9910 driver feature extension and SUServo IIR readability (#1500) 
* coredevice.ad9910: Add set_cfr2 function and extend arguments of set_cfr1 and set_sync

* SUServo: Wrap CPLD and DDS devices in a list

* SUServo: Refactor [nfc]

Co-authored-by: drmota <peter.drmota@physics.ox.ac.uk>
Co-authored-by: David Nadlinger <code@klickverbot.at>
 2021-11-15 12:09:16 +08:00
occheung 750b0ce46d ddb_temp: select appropriate compiler target 2021-11-08 16:59:08 +08:00
Robert Jördens 591507a7c0
Merge pull request #1774 from m-labs/fastino-cic 
Fastino cic
 2021-10-28 17:44:20 +02:00
Robert Jördens 5a5b0cc7c0 fastino: expand docs 2021-10-28 15:19:48 +00:00
Robert Jördens 1ff474893d Revert "fastino: make driver filter order configurable" 
This reverts commit 10c37b87ec.
 2021-10-28 06:29:56 +00:00
Robert Jördens 10c37b87ec fastino: make driver filter order configurable 2021-10-27 20:24:58 +00:00
Sebastien Bourdeauducq 3c1cbf47d2 phaser: add more slack during init. Closes #1757 2021-10-10 16:18:55 +08:00
Robert Jördens 3f6bf33298 fastino: add interpolator support 2021-10-08 15:47:07 +00:00
occheung 5985f7efb5 syscall: lower nowrite to inaccessiblememonly 
In the origin implementation, the `nowrite` flag literally means not writing memory at all.
Due to the usage of flags on certain functions, it results in the same issues found in artiq-zynq after optimization passes. (M-Labs/artiq-zynq#119)
A fix wrote by @dnadlinger can resolve this issue. (c1e46cc7c8)
 2021-09-10 13:25:12 +08:00
occheung 1da0554a49 pcr: purge 2021-09-10 13:25:12 +08:00
Sebastien Bourdeauducq 43d120359d compiler: switch to upstream llvmlite and RISC-V target 2021-09-10 13:25:12 +08:00
Etienne Wodey 4d7bd3ee32 phaser: fail init() if frame timestamp measurement times out 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-03 12:01:26 +02:00
Etienne Wodey 075cb26dd7 phaser: rename get_next_frame_timestamp() to get_next_frame_mu() 
and implement review comments (PR #1749)

Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-03 09:58:01 +02:00
Etienne Wodey 7aebf02f84 phaser: docs: add reference to get_next_frame_timestamps(), fix typo 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-01 17:44:46 +02:00
Etienne Wodey 61b44d40dd phaser: add labels to debug init prints 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-01 17:43:30 +02:00
Etienne Wodey 65f8a97b56 phaser: add helpers to align updates to the RTIO timeline 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-01 17:42:54 +02:00
Mikołaj Sowiński 898122f3e5
Added support for HVAMP_8CH (#1741) 2021-08-16 13:39:00 +08:00
Sebastien Bourdeauducq 477b1516d3 remove profiler 2021-08-12 12:51:55 +08:00
Harry Ho c9608c0a89 zotino: default div_read unified with ad53xx at 16, fix ad53xx doc 2021-08-05 17:42:11 +08:00
Star Chen 6b88ea563d
talk to ICAP primitive to restart gateware (#1733) 2021-08-05 17:00:31 +08:00
Sebastien Bourdeauducq c3d765f745 ad9910: fix type annotations 2021-08-05 11:30:54 +08:00
Star Chen 30e5e06a33
moninj: fix read of incomplete data (#1729) 2021-07-22 17:56:38 +08:00
occheung 2204fd2b22 adf5356: add delay to sync() 
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
 2021-07-08 10:03:20 +08:00
Etienne Wodey 68268e3db8 docs: fix some formatting issues 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-06-23 20:29:43 +08:00
pca006132 4c743cf8af revert busy polling 2021-05-23 14:07:11 +08:00
pca006132 1e9a131386 coredevice.comm_kernel: performance improvement 
reduced latency by busy polling, and improved byte list performance.
 2021-05-23 13:30:00 +08:00
Harry Ho 43b2a3791c jsonschema: only allow enable_sata_drtio=true for Kasli if v1.0/1.1 2021-05-17 12:46:19 +08:00
Marius Weber 129cf8c1dd Phaser: Make set_nco_phase set the phase of the NCO 
Previous to this commit `set_nco_phase()` set the phase of the DUC instead
of the NCO. Setting the phase of the NCO may be desirable to utilise the
auto-sync functionality of the double-buffered DAC-NCO settings.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-11 23:16:14 +01:00
Marius Weber 043c9c20d7 phaser: Improve documentation of DAC settings 
1. Clarify which features require additional configuration via the `dac`
   constructor argument.
2. Document when DAC settings apply immediatly/are staged.
3. Document how staged DAC settings may be applied
4. Calrify operation of `dac_sync`

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:58:30 +01:00
Marius Weber f97baa8aec phaser: workaround malformed output with `mixer_ena=1` & `nco_ena=0` 
When Phaser is powered on and `init()` is first called, enabling the
DAC-mixer while leaving the NCO disabled causes malformed output.
This commit implements a workaround by making sure the NCO is enabled,
before being set to the disired state.

This commit also avoids the following procedure, resulting in
malformed output:
1. Operate Phaser with the DAC Mixer and NCO enabled
2. Set the NCO to a non-zero frequency
3. Disable the NCO in the device_db
4. Re-initialise Phaser

After this procedure, with CMIX disabled, incorrect output is produced.
To clear the fault one must re-enable the NCO and write the NCO freqeuncy
to zero before disabling the NCO.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber 4fa2028671 phaser: fix coarse mixer register offset 
The CMIX bits are bits 12-15 in register 0x0d. This has been checked
against the datasheet and verified on hardware. Until now, the bit for
CMIX1 was written to CMIX0. The CMIX0 bit was written to a reserved bit.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber 515cfa7dfb Phaser: expose coarse mixer and document need to enable the DAC-mixer. 
in some use cases a larger tunable range than available via the DUC may
be needed. Some use cases may wish to combine the coarse mixer with the
DUC to extend the tunable range.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber 4f812cc4ed Phaser: zero oscillator amplitude after `init()` (close #1651) 
Currently, `init()` leaves a single oscillator at full scale. The phase
accumulator of this oscillator is held continuously cleared. Provided no
upconverting mechanism is active (DUC, CMIX, NCO), this produces a full-scale
DC voltage. The DC voltage is blocked by hardware capacitors. This behaviour
is not mentioned by the `init` documentation.

If one attempts to use any other oscillator without reducing the amplitude
of the oscillator enabled by `init`, there is by significant clipping.

In the case that the NCO or CMIX are configured via the device_db
(suggested in the docs), leaving the osillator at full scale results in
full RF output power after calling `init()`. This may plausibly damage loads
driven by phaser.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber 407fba232d Phaser upconverter: set phase-frequency detector to 62.5 MHz (close #1648) 
The suitable PFD clock depends on the use case and will likely need
to be configured by some users. All things being equal, a higher PFD
clock is desirable as is results in lower local oscillator phase-noise.

Phaser was designed around a maximum PFD clock of 62.5 MHz. In integer mode,
with no local oscillator frequency divisor set, a 62.5 MHz PFD clock results
in a 125 MHz local oscillator step size. Given the +-200 MHz range of the DUC
(more if using the DAC mixer), this step size will be acceptable to many.
This seems like the most appropreate default configuration as it should offer
the best phase-noise performance.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber 75445fe5f0 Phaser: expose and automate clearing of DAC `sif_sync` (close #1630 and #1650) 
`sif_sync` must be triggered to apply NCO frequency changes. To achieve per
channel frequency tunability exeeding the range of the DUC, the NCO frequeny must
adjusted. User code will need to trigger `sif_sync` to achieve this.

`sif_sync` can only be triggered if the bit was cleared. To avoid this pitfall,
the clearing of `sif_sync` is automated.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber 1c96797de5 Phaser upconverter: Follow datasheet procedure for VCO calibration (close #1643) 
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber 7404152e4c Phaser upconverter: rename `ndiv` -> `nint` to match datasheet (close #1638) 
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber eb477ee06b phaser: print gw_rev in debug mode 2021-05-08 14:48:46 +01:00
Marius Weber c7e992e26d Phaser: flake8 
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:46 +01:00
Sebastien Bourdeauducq eb38b664e3 phaser: typo 2021-05-07 10:00:10 +08:00
Peter Drmota 47bf5d36af coredevice.comm_kernel: Fix unpacking of lists of numpy.int64 
test.coredevice.test_embedding: Add tests for list of numpy.int64
 2021-04-21 15:46:58 +01:00
Leon Riesebos 2671c271d4 ad99xx unified type annotations for cfg_sw() methods and fixed test cases 
closes #1642

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-04-21 11:29:55 +08:00
Leon Riesebos d745d50245 ad99xx added additional kernel invariants 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-04-21 11:18:31 +08:00
Leon Riesebos 4a6201c083 ad99xx make kernel invariants instance variable 
prevents mutations on class variable that applies to all instances at once
closes #1654

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-04-21 11:18:31 +08:00
Robert Jördens ffe1c9f9b1
Merge pull request #1628 from pathfinder49/fastino_mu_fix 
fastino: ensure `xxx_to_mu()` methods return int32 on the host
 2021-04-15 15:02:12 +02:00
Marius Weber bda5aa7c7e fastino: ensure `xxx_to_mu()` methods return int32 on the host 
Currently running `voltage_to_mu()` or `voltage_group_to_mu()` on the host will
convert all machine unit values to int64. This leads to issues when machine units
are returned from RPCs.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-04-15 11:41:22 +01:00
Harry Ho fc59791583 jsonschema: mirny: fix clk_sel default value 2021-03-30 16:06:56 +08:00
Harry Ho 8002fcf8bb jsonschema: style 2021-03-29 17:49:43 +08:00
Harry Ho 5f32cb7196 jsonschema: mirny: accept string enums for validating clk_sel 2021-03-29 17:49:43 +08:00
David Nadlinger 888696f588 coredevice: Fix RPC typing for bool lists/arrays 
GitHub: Fixes #1635.
 2021-03-20 00:03:10 +00:00
Leon Riesebos d04bcd8754 add get_*() functions to ad9910, ad9912, and urukul. closes #1616 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-03-15 13:06:24 +08:00
Leon Riesebos c22f731a61 added typing and reformatted driver for ad9910, ad9912, and urukul 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-03-15 13:06:24 +08:00
Astro 3844cde97b jsonschema: validate hw_dev depending on target 2021-02-12 11:09:01 +08:00
Astro 4b2ed67dd7 coredevice_generic.schema.json: add "min_artiq_version" 2021-02-10 15:26:15 +08:00
Sebastien Bourdeauducq 1213f78ee9 jsonschema: support kasli_soc 2021-02-07 13:39:01 +08:00
Robert Jördens 2f5ea67b69
Merge pull request #1596 from airwoodix/fix-adf5356-init 
coredevice/adf5356: fix initial device detection
 2021-02-02 18:20:08 +01:00
Etienne Wodey d691b05d78 coredevice/mirny: better error handling for clk_sel 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-02-02 16:23:47 +01:00
Etienne Wodey 6f8e788620 coredevice/mirny: support human readable clk_sel 
In init(), read hw_rev to derive clk_sel code from user string.

Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-01-29 18:46:47 +01:00
Etienne Wodey a8bc98a77b coredevice/adf5356: fix initial device detection 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-01-28 18:29:40 +01:00
David Nadlinger f9872bb7b8 coredevice: Handle prematurely closed sockets in comm_kernel receive loop 
recv() returns 0 instead of data if the socket has already
been closed. This is translated into a zero-length list on
the Python layer. Previously, the code would enter an
infinite loop if the socket was closed while attempting
to receive data.
 2021-01-26 18:10:49 +08:00
David Nadlinger f1fd42ea98 coredevice: Re-enable TCP keepalive 
This partially reverts commit b5e1bd3fa2,
which had removed keepalive. This, however, led to experiments
hanging forever if the core device had dropped the connection
(e.g. to a kernel CPU panic, or the device being rebooted).

The chosen keepalive settings are fairly conservative (with the
10 s timeout) to avoid any possible interaction with smoltcp's
3 s ARP try interval (see GitHub issue #1150), even though this
should be a non-issue now due to the larger ARP cache.
 2021-01-26 18:10:49 +08:00
pca006132 8148fdb8a7
use device endian for core device protocols (#1591) 2021-01-22 16:33:21 +08:00
David Nadlinger 1e443a3aea coredevice: Reuse Target.little_endian for protocol endianness [nfc] 2021-01-21 09:11:54 +01:00
pca006132 ec72eeda46 coredevice: use device endian for kernel and RPC 2021-01-21 09:07:48 +01:00
Robert Jördens 261870bdee phaser: fix oscillator rtio address for even base addresses 
close #1580
 2021-01-19 16:56:50 +01:00
Sebastien Bourdeauducq c675488a99 reorganize JSON schema files 2021-01-16 10:43:14 +08:00
Sebastien Bourdeauducq 1ce505c547 coredevice: remove obsolete watchdog code (#1458) 2020-12-08 13:25:39 +08:00
Marius Weber 3e38833020 ad9910: fix `turns_to_pow` return-type on host 
When run on the host, the `turns_to_pow` retrun-type is numpy.int64.
Sensibly, the compiler does not attempt to convert `numpy.int64` to `int32`.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2020-11-13 18:54:47 +01:00
David Nadlinger 292043a0a7 compiler: Raise AssertionErrors instead of abort()ing on all targets 2020-11-10 20:40:18 +01:00
Etienne Wodey dbcac62fd0 coredevice: adf5356: fix/adjust docs 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-11-10 10:49:22 +08:00
Etienne Wodey 3844123c13 coredevice: adf5356: add enable/disable and power setting for outA 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-11-10 10:49:22 +08:00
Etienne Wodey b200465cce coredevice: adf5355: rename to adf5356 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-11-10 10:49:22 +08:00
Etienne Wodey d433f6e86d coredevice: adf5355: more general PLL parameters calculation 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-11-10 10:49:22 +08:00
Etienne Wodey b856df7c35 coredevice: adf5355: cleanup, style 2020-11-10 10:49:22 +08:00
Etienne Wodey 211500089f coredevice: mirny/adf5355: add basic high-level interface 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-11-10 10:49:22 +08:00
David Nadlinger 4f311e7448 compiler: Raise exception on failed assert()s rather than panic 
This allows assert() to be used on Zynq, where abort() is not
currently implemented for kernels. Furthermore, this is arguably
the more natural implementation of assertions on all kernel targets
(i.e. where embedding into host Python is used), as it matches host
Python behavior, and the exception information actually makes it to
the user rather than leading to a ConnectionClosed error.

Since this does not implement printing of the subexpressions, I
left the old print+abort implementation as default for the time
being.

The lit/integration/instance.py diff isn't just a spurious change;
the exception-based assert implementation exposes a limitation in
the existing closure lifetime tracking algorithm (which is not
supposed to be what is tested there).

GitHub: Fixes #1539.
 2020-11-10 00:51:24 +01:00
Etienne Wodey ecef5661ce coredevice/phaser: fix typos in docstring 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-10-29 20:27:08 +01:00
Robert Jördens eecd97ce4c phaser: debug and comments 2020-09-27 17:15:16 +00:00
Robert Jördens c453c24fb0 phaser: tweak slacks 2020-09-26 21:16:08 +00:00
Robert Jördens 6c8bddcf8d phaser: tune sync_dly 2020-09-26 21:13:00 +00:00
Robert Jördens 569e5e56cd phaser: autotune and fix fifo_offset 2020-09-26 20:37:16 +00:00
Robert Jördens 2fba3cfc78 phaser: debug init, systematic bring-up 2020-09-25 20:54:59 +00:00
Robert Jördens fec2f8b763 phaser: increase slack for iotest 2020-09-24 10:59:22 +00:00
Robert Jördens 6e6480ec21 phaser: tweak slacks and errors, identify trf 2020-09-24 08:38:30 +00:00
Robert Jördens 03d5f985f8 phaser: another artiq-python signed integer quirk 2020-09-23 15:40:54 +00:00
Robert Jördens ef65ee18bd dac34h84: unflip spectrum, clear nco 2020-09-23 08:35:56 +00:00
Robert Jördens 50b4eb4840 Merge branch 'master' into phaser 
* master: (26 commits)
  fastino: documentation and eem pass-through
  kasli2: forward sma_clkin to si5324
  test: relax test_dma_playback_time on Zynq
  rpc: fixed _write_bool
  fastino: document/cleanup
  build_soc: remove assertion that was used for test runs
  metlino_sayma_ttl: Fix RTIO frequency & demo code (#1516)
  Revert "test: temporarily disable test_async_throughput"
  build_soc: rename identifier_str to gateware_identifier_str
  test: relax loopback gate timing
  test: temporarily disable test_async_throughput
  test: relax test_pulse_rate on Zynq
  test: skip NonexistentI2CBus if I2C is not supported
  build_soc: override identifier_str only for gateware
  examples: add Metlino master, Sayma satellite with TTLOuts via FMC
  sayma_amc: add support for 4x DIO output channels via FMC
  fmcdio_vhdci_eem: fix pin naming
  build_soc: add identifier_str override option
  RPC: optimization by caching
  test: improved test_performance
  ...
 2020-09-22 16:02:25 +00:00
Robert Jördens c55f2222dc fastino: documentation and eem pass-through 
* Repeat information about matching log2_width a few times
  in the hope that people read it. #1518
* Pass through log2_width in kasli_generic json. close #1481
* Check DAC value range. #1518
 2020-09-22 17:58:53 +02:00
Robert Jördens 85d16e3e5f phaser: tweaks 2020-09-22 15:27:38 +00:00
Robert Jördens fd5e221898 phaser: dac and trf register maps, init code 2020-09-22 14:08:39 +00:00
Robert Jördens 3e036e365a phaser: nco, settings and init tweaks 2020-09-22 09:52:49 +00:00
Robert Jördens fdb2867757 phaser: fewer iotest patterns 2020-09-21 17:06:26 +02:00
Robert Jördens d730851397 phaser: elaborate init sequence, more tests 2020-09-21 15:05:29 +00:00
Robert Jördens f0959fb871 phaser: iotest early, check_alarms 2020-09-17 14:13:58 +00:00
Robert Jördens b15e388b5f ad53xx: distinguish errors 2020-09-17 14:13:10 +00:00
Robert Jördens c18f515bf9 phaser: rework rtio channels, sync_dly, init() 2020-09-16 12:23:07 +00:00
Robert Jördens f3b0398720 phaser: n=2, m=16, sync_dly 2020-09-16 09:19:15 +00:00
Robert Jördens 9b58b712a6 phaser: doc tweaks 2020-09-15 12:35:26 +00:00
Robert Jördens ff57813a9c phaser: init [wip] 2020-09-15 08:46:47 +00:00
Robert Jördens 07418258ae phaser: init [wip] 2020-09-15 08:46:10 +00:00
Robert Jördens 3a79ef740b phaser: work around integer size 2020-09-15 08:46:10 +00:00
Robert Jördens b449e7202b phaser: rework docs 2020-09-15 08:46:10 +00:00
Robert Jördens b619f657b9 phaser: doc tweaks 2020-09-12 19:59:49 +02:00
Robert Jördens c3728678d6 phaser: document, elaborate comments, some fixes 2020-09-12 17:35:14 +00:00
Robert Jördens e505dfed5b phaser: refactor coredevice driver 2020-09-12 14:17:40 +00:00
Robert Jördens fdd2d6f2fb phaser: SI methods 2020-09-12 11:02:37 +00:00
Robert Jördens e69bb0aeb3 phaser: add comment about get_dac_data 2020-09-07 16:06:16 +00:00
pca006132 6195b1d3a0 rpc: fixed _write_bool 
Closes #1519
 2020-09-04 13:49:22 +08:00
Robert Jördens 56aa22caeb fastino: document/cleanup 
* added documentation on `update`/`hold` mechanism
* mask machine unit values
* cleanup coredevice driver

close #1518
 2020-09-03 17:44:26 +02:00
Robert Jördens 272dc5d36a phaser: documentation 2020-08-28 16:36:44 +00:00
pca006132 b2572003ac RPC: optimization by caching 
This reduced the calls needed for socket send/recv.
 2020-08-28 14:58:34 +08:00
Sebastien Bourdeauducq 7cf974a6a7 comm_kernel: fix typo 2020-08-28 12:25:23 +08:00
Robert Jördens 68bfa04abb phaser: trf readback strobe spi changes 2020-08-27 15:31:42 +00:00
Robert Jördens c10ac2c92a phaser: add trf, duc, interfaces, redo body assembly, use more natrual iq ordering (i lsb) 2020-08-27 14:26:09 +00:00
Robert Jördens e5e2392240 phaser: wire up multidds 2020-08-26 17:12:41 +00:00
Robert Jördens d1be1212ab phaser: coredevice shim, dds [wip] 2020-08-26 15:10:50 +00:00
pca006132 7181ff66a6 compiler: improved rpc performance for list and array 
1. Removed duplicated tags before each elements.
2. Use numpy functions to speedup parsing.
 2020-08-26 14:17:06 +08:00
Robert Jördens 20fcfd95e9 phaser: coredevice shim, readback fix 2020-08-24 15:46:31 +00:00
David Nadlinger 8783ba2072 compiler/firmware: RPCs for ndarrays 2020-08-09 17:08:43 +01:00
David Nadlinger 9af6e5747d compiler: Factor rpc_tag() out of llvm_ir_generator 2020-08-09 03:54:41 +01:00
pmldrmota 1df62862cd
AD9910: Write correct number of bits to POW register (#1498) 
* coredevice.ad9910: Add return type hints to conversion functions

* coredevice.ad9910: Make set_pow write correct number of bits
The AD9910 expects 16 bits. Thus, if writing 32 bits to the POW register, the chip would likely enter a locked-up state.

* coredevice.ad9910: Correct data alignment in write_16

Co-authored-by: Robert Jördens <rj@quartiq.de>

* coredevice.ad9910: Add function to read from 16 bit registers

Co-authored-by: drmota <peter.drmota@physics.ox.ac.uk>
Co-authored-by: Robert Jördens <rj@quartiq.de>
 2020-08-07 10:10:44 +02:00
Sebastien Bourdeauducq 2a2f5c4d58 comm_analyzer: make header error flag more general 2020-07-20 19:39:19 +08:00
charlesbaynham 2429a266f6
ad9912: Fix typing problem on ad9912 (#1466) 
Closes #1463

FTW and phase word were ambiguously typed, resulting in failure to compile
 2020-06-16 20:17:22 +02:00
Robert Jördens 9822b88d9b
ad9910: fix asf range (#1450) 
* ad9910: fix asf range

The ASF is a 14-bit word. The highest possible value is 0x3fff, not
0x3ffe. `int(round(1.0 * 0x3fff)) == 0x3fff`.

I don't remember and understand why this was 0x3ffe since the beginning.
0x3fff was already used as a default in `set_mu()`

Signed-off-by: Robert Jördens <rj@quartiq.de>

* RELEASE_NOTES: ad9910 asf scale change

Co-authored-by: David Nadlinger <code@klickverbot.at>
 2020-05-29 11:13:26 +02:00
Marius Weber 2538840756
Coredevice Input Validation (#1447) 
* Input validation and masking of SI -> mu conversions (close #1446)

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* Update RELEASE_NOTES

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

Co-authored-by: Robert Jördens <rj@quartiq.de>
 2020-05-17 15:09:11 +02:00
Marius Weber b3b6cb8efe
ad53xx improvements (#1445) 
* ad53xx: voltage_to_mu() validation & documentation (closes #1443, #1444)
The voltage input (float) is checked for validity. If we need more
speed, we may want to check the DAC-code for over/underflow instead.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx documentation: voltage_to_mu is only valid for 16-bit DACs

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* AD53xx: add voltage_to_mu method (closes #1341)

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx: improve voltage_to_mu performance
Interger comparison is faster than floating point math.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* AD53xx: voltage_to_mu method now uses attribute values

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* Fixup RELEASE_NOTES.rst

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx: documentation improvements

voltage_to_mu return value
14-bit DAC support

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2020-05-08 19:23:43 +02:00
Sebastien Bourdeauducq e8b73876ab comm_kernel: add Zynq runtime identifier 2020-04-12 17:25:14 +08:00
Sebastien Bourdeauducq de57039e6e comm_kernel: cleanup 2020-04-12 16:02:36 +08:00
Sebastien Bourdeauducq 9dc24f255e comm_kernel: remove dead code 2020-04-12 15:06:46 +08:00
Robert Jördens e803830b3b fastino: support wide RTIO interface and channel groups 2020-03-05 17:55:04 +00:00
Sebastien Bourdeauducq 8451e58fbe ad9912: fix ftw width docstring 2020-02-27 02:11:12 +08:00
Robert Jördens 248230a89e fastino: style 2020-01-20 13:25:00 +01:00
Robert Jördens c45a872cba fastino: fix init, set_cfg 2020-01-20 13:25:00 +01:00
Robert Jördens 2c4e5bfee4 fastino: add [WIP] 2020-01-20 13:25:00 +01:00
Sebastien Bourdeauducq e427aaaa66 basemod_att: fix imports 2020-01-20 20:14:24 +08:00
Robert Jördens 7ab0282234 adf5355: style 2020-01-20 13:13:08 +01:00
Robert Jördens 9368c26d1c mirny: add to manual 2020-01-20 13:13:08 +01:00
Robert Jördens 01a6e77d89 mirny: add 
* This targets unrelease CPLD gateware (https://github.com/quartiq/mirny/issues/1)
* includes initial coredevice driver, eem shims, and kasli_generic tooling
* addresses the ARTIQ side of #1130
* Register abstraction to be written

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2020-01-20 13:13:08 +01:00
Sebastien Bourdeauducq 833f428391 sayma: fix hmc542 to/from mu 2020-01-16 09:10:32 +08:00
David Nadlinger 1e864b7e2d coredevice/suservo: Add separate methods for setting only the IIR offset 2019-12-30 20:02:22 +00:00
Sebastien Bourdeauducq b5e1bd3fa2 coredevice: simplify/cleanup network connection code 
This removes:
* host-side keepalive, which turns out not to be required
* custom connection timeout (the default is OK)
* SSH tunneling support (doesn't seem to be actually used anywhere)
 2019-12-23 19:53:49 +08:00
David Nadlinger af31c6ea21 coredevice: Don't use `is` to compare with integer literal 
This works on CPython, but is not guaranteed to do so, and
produces a warning since 3.8 (see https://bugs.python.org/issue34850).
 2019-12-22 05:46:41 +00:00
Sebastien Bourdeauducq fb2076a026 basemod_att: add dB functions, document 2019-12-21 14:56:41 +08:00
Sebastien Bourdeauducq d4e039cede basemod: add coredevice driver 2019-12-21 14:18:10 +08:00
Sebastien Bourdeauducq 8759c8d360 shiftreg: fix get method 2019-12-21 14:17:22 +08:00
Sebastien Bourdeauducq cab8c8249e coredevice/shiftreg: add get method 2019-12-20 18:58:50 +08:00
gthickman 56d4b70e01 ad9910 osk (#1387) 
* updated adoo10.py for RAM mode frequency control

* updated docstrings for set_cfr1() in ad9910.py

* fixed typo in ad9910.py

* added docstrings to ad9910.py

* removed OSK-related changes in AD9910, to be included in a separate branch.

* updated AD9910 set_cfr1 for control of OSK mode parameters

* updated AD9910 set_cfr1() for control of OSK mode parameters.
 2019-11-18 15:57:26 +01:00
Fabian Schmid f73e2a3d30 doc: clarify urukul attenuator behavior 
Closes #1386

Signed-off-by: Fabian Schmid <fabian.schmid@mpq.mpg.de>
 2019-11-18 15:56:00 +01:00
Garrett f8a7e278b8 removed OSK-related changes in AD9910, to be included in a separate branch. 2019-11-12 19:07:05 +01:00
Garrett 3a19ba7e62 added docstrings to ad9910.py 2019-11-12 19:07:05 +01:00
Garrett 4ad3651022 fixed typo in ad9910.py 2019-11-12 19:07:05 +01:00
Garrett 6d34eb3bb0 updated docstrings for set_cfr1() in ad9910.py 2019-11-12 19:07:05 +01:00
Garrett 61ca46ec3f updated adoo10.py for RAM mode frequency control 2019-11-12 19:07:05 +01:00
Sebastien Bourdeauducq 5279bc275a urukul: rework EEPROM synchronization. Closes #1372 2019-11-05 18:56:10 +08:00
Robert Jördens 1f15e55021 comm_analyzer: don't assume every message has data 
close #1377
 2019-10-28 15:35:44 +01:00
Sebastien Bourdeauducq a8f85860c4 coreanalyzer: AD9914 fixes (#1376) 2019-10-17 07:29:33 +08:00
Tim Ballance ada3b39f4e Fix ad9910 ram mode asf scale error in polar mode 2019-10-04 20:14:41 +02:00
Tim Ballance 448080e71d Fix ad9910 ram mode asf scale error 
RAM mode amplitude to ASF conversion should be << 18 rather than << 16
 2019-10-04 20:14:41 +02:00
Sebastien Bourdeauducq 98cd9a539c compiler: support Cortex A9 target 2019-08-26 10:46:22 +08:00
David Nadlinger 99e490f9ff coredevice/suservo: Slightly reword get_adc[_mu]() docstring for clarity 
This hopefully suggests a bit better that the value is the last one
fetched by the servo (i.e. needs the servo active to update), rather
than somehow requesting a new sample to be taken.
 2019-07-30 12:22:08 +01:00
Sebastien Bourdeauducq b8870997d0 doc: clarify TTL direction control with buffered cards 2019-07-24 10:04:45 +08:00
David Nadlinger 280915d54f coredevice/suservo: Adjust T_CYCLE to match gateware 
See GitHub #1338.
 2019-07-17 00:20:22 +01:00
Robert Jördens f7e10759dc suservo: note requirement to stop servo when accessing state 
As already mentioned in the gateware.

One alternative would be to detect address collisions and
stall the read for one cycle.

Note that there will in general not be a consistent view of the servo
state unless the servo is stopped.

close #1337
 2019-07-08 18:37:42 +02:00
David Nadlinger 8bf9640185 coredevice/suservo: Fix output IIR state width in docstring 2019-06-21 11:27:39 +02:00
David Nadlinger 34f48f57cc coredevice/suservo: Fix {get,set}_y_mu() scaling 
Previously, Channel.set_y(1) would set the output to -1 instead.
 2019-06-21 11:27:39 +02:00
Sebastien Bourdeauducq 74e4b01201 urukul: document consequences of incorrect CPLD clock settings 2019-06-11 11:12:12 +08:00
Brad Bondurant adf3df2bb5 suservo coredevice driver: mask ftw to avoid erroneous sign extension 2019-06-03 21:40:04 +02:00
David Nadlinger fc95183e04 coredevice: Fix host-side serialization of (nested) lists 
Test case to follow.
 2019-03-31 17:10:27 +01:00
Sebastien Bourdeauducq d07c6fcfea ad9910: handle unprogrammed EEPROM and numpy corner cases 2019-03-22 14:28:47 +08:00
Sebastien Bourdeauducq 04e0c23e78 ad9910: support reading synchronization values from EEPROM 2019-03-13 15:34:47 +08:00
Sebastien Bourdeauducq 964a349a19 add Kasli I2C driver 2019-03-13 15:33:50 +08:00
Sebastien Bourdeauducq 227c729f56 fix permissions 2019-03-11 20:43:28 +08:00
Robert Jördens aee8965897 ad9910: add ram conversion tooling and unittests 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-02-21 15:59:52 +00:00
Robert Jördens b57cad77ad ad9910: make ram read work for short segments 
also cleanup and style

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-02-21 14:47:58 +00:00
hartytp 0ebff04ad7 SUServo: apply bit masks to servo memory writes to prevent overflows 
Signed-off-by: TPH <thomas.harty@physics.ox.ac.uk>
 2019-02-07 17:04:11 +01:00
hartytp f6142816b8
Revert "SUServo: remove references to non-existent a0 parameter" (#1270) 
This reverts commit f3aab2b891.

Signed-off-by: TPH <thomas.harty@physics.ox.ac.uk>
 2019-02-07 15:57:43 +00:00
hartytp fe63c9b366
SUServo: remove references to non-existent a0 parameter (#1268) 
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
 2019-02-07 15:29:32 +00:00
hartytp df6c1fca2c
SUServo: flake8 [NFC] (#1267) 
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
 2019-02-07 15:13:44 +00:00
Robert Jördens 8c5a502591 ad53xx: ignore F3 (reserved) 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-01-24 15:50:46 +01:00
Sebastien Bourdeauducq 330c5610e9 ad9912: fix imports 2019-01-23 17:59:08 +08:00
Robert Jördens b692981c8e ad9910: add note about red front panel led 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-01-22 12:49:42 +01:00