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Installing ARTIQ
================
The preferred way of installing ARTIQ is through the use of the conda package manager.
The conda package contains pre-built binaries that you can directly flash to your board.
But you can also :ref:`install from sources <install-from-sources>`.
.. warning::
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NIST users on Linux need to pay close attention to their ``umask``.
The sledgehammer called ``secureconfig`` leaves you (and root) with umask 027 and files created by root (for example through ``sudo make install``) inaccessible to you.
The usual umask is 022.
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Installing using conda
----------------------
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.. warning::
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Conda packages are supported for Linux (64-bit) and Windows (32- and 64-bit).
Users of other operating systems (32-bit Linux, BSD, OSX ...) should and can :ref:`install from source <install-from-sources>`.
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Installing Anaconda or Miniconda
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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You can either install Anaconda (choose Python 3.5) from https://store.continuum.io/cshop/anaconda/ or install the more minimalistic Miniconda (choose Python 3.5) from http://conda.pydata.org/miniconda.html
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After installing either Anaconda or Miniconda, open a new terminal (also known as command line, console, or shell and denoted here as lines starting with ``$``) and verify the following command works::
$ conda
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Executing just ``conda`` should print the help of the ``conda`` command [1]_.
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Installing the ARTIQ packages
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Add the M-Labs ``main`` Anaconda package repository containing stable releases and release candidates to your conda configuration::
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$ conda config --add channels http://conda.anaconda.org/m-labs/label/main
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.. note::
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To use the development versions of ARTIQ, also add the ``dev`` label (http://conda.anaconda.org/m-labs/label/dev).
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Development versions are built for every change and contain more features, but are not as well-tested and are more likely to contain more bugs or inconsistencies than the releases in the ``main`` label.
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Then prepare to create a new conda environment with the ARTIQ package and the matching binaries for your hardware:
choose a suitable name for the environment, for example ``artiq-main`` if you intend to track the main label or ``artiq-2016-04-01`` if you consider the environment a snapshot of ARTIQ on 2016-04-01.
Choose the package containing the binaries for your hardware:
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* ``artiq-pipistrello-nist_qc1`` for the `Pipistrello <http://pipistrello.saanlima.com/>`_ board with the NIST adapter to SCSI cables and AD9858 DDS chips.
* ``artiq-kc705-nist_qc1`` for the `KC705 <http://www.xilinx.com/products/boards-and-kits/ek-k7-kc705-g.html>`_ board with the NIST adapter to SCSI cables and AD9858 DDS chips.
* ``artiq-kc705-nist_clock`` for the KC705 board with the NIST "clock" FMC backplane and AD9914 DDS chips.
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* ``artiq-kc705-nist_qc2`` for the KC705 board with the NIST QC2 FMC backplane and AD9914 DDS chips.
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Conda will create the environment, automatically resolve, download, and install the necessary dependencies and install the packages you select::
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$ conda create -n artiq-main artiq-pipistrello-nist_qc1
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After the installation, activate the newly created environment by name.
On Unix::
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$ source activate artiq-main
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On Windows::
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$ activate artiq-main
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This activation has to be performed in every new shell you open to make the ARTIQ tools from that environment available.
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.. note::
[Linux] The ``qt5`` package requires libraries not packaged under the ``m-labs`` conda labels.
Those need to be installed through the Linux distribution's mechanism.
If GUI programs do not start because they ``could not find or load the Qt platform plugin "xcb"``, install the various ``libxcb-*`` packages through your distribution's preferred mechanism.
The names of the libraries missing can be obtained from the output of a command like ``ldd [path-to-conda-installation]/envs/artiq-main/lib/qt5/plugins/platform/libqxcb.so``.
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.. note::
Some ARTIQ examples also require matplotlib and numba, and they must be installed manually for running those examples. They are available in conda.
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Upgrading ARTIQ
^^^^^^^^^^^^^^^
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When upgrading ARTIQ or when testing different versions it is recommended that new environments are created instead of upgrading the packages in existing environments.
Keep previous environments around until you are certain that they are not needed anymore and a new environment is known to work correctly.
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You can create a new conda environment specifically to test a certain version of ARTIQ::
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$ conda create -n artiq-test-1.0rc2 artiq-pipistrello-nist_qc1=1.0rc2
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Switching between conda environments using ``$ source deactivate artiq-1.0rc2`` and ``$ source activate artiq-1.0rc1`` is the recommended way to roll back to previous versions of ARTIQ.
You can list the environments you have created using::
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$ conda env list
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See also the `conda documentation <http://conda.pydata.org/docs/using/envs.html>`_ for managing environments.
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Preparing the core device FPGA board
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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You now need to write three binary images onto the FPGA board:
1. The FPGA gateware bitstream
2. The BIOS
3. The ARTIQ runtime
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They are all shipped in the conda packages, along with the required flash proxy gateware bitstreams.
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.. _install-openocd:
Installing OpenOCD
..................
OpenOCD can be used to write the binary images into the core device FPGA board's flash memory. It can be installed using conda on both Linux and Windows::
$ conda install openocd
Some additional steps are necessary to ensure that OpenOCD can communicate with the FPGA board.
On Linux, first ensure that the current user belongs to the ``plugdev`` group. If it does not, run ``sudo adduser $USER plugdev`` and relogin. Afterwards::
$ wget https://raw.githubusercontent.com/ntfreak/openocd/406f4d1c68330e3bf8d9db4e402fd8802a5c79e2/contrib/99-openocd.rules
$ sudo cp 99-openocd.rules /etc/udev/rules.d
$ sudo adduser $USER plugdev
$ sudo udevadm trigger
On Windows, a third-party tool, `Zadig <http://zadig.akeo.ie/>`_, is necessary. Use it as follows:
1. Make sure the FPGA board's JTAG USB port is connected to your computer.
2. Activate Options → List All Devices.
3. Select the "Digilent Adept USB Device (Interface 0)" (for KC705) or "Pipistrello LX45" (for Pipistrello) device from the drop-down list.
4. Select WinUSB from the spinner list.
5. Click "Install Driver" or "Replace Driver".
You may need to repeat these steps every time you plug the FPGA board into a port where it has not been plugged into previously on the same system.
Then, you can flash the board:
* For the Pipistrello board::
$ artiq_flash -t pipistrello -m nist_qc1
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* For the KC705 board (selecting the appropriate hardware peripheral)::
$ artiq_flash -t kc705 -m [nist_qc1/nist_clock/nist_qc2]
The SW13 switches also need to be set to 00001.
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For the KC705, the next step is to flash the MAC and IP addresses to the board. See :ref:`those instructions <flash-mac-ip-addr>`.
.. _install-from-sources:
Installing from source
----------------------
Preparing the build environment for the core device
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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These steps are required to generate code that can run on the core
device. They are necessary both for building the MiSoC BIOS
and the ARTIQ kernels.
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* Create a development directory: ::
$ mkdir ~/artiq-dev
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* Clone ARTIQ repository: ::
$ cd ~/artiq-dev
$ git clone --recursive https://github.com/m-labs/artiq
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* Install OpenRISC binutils (or1k-linux-...): ::
$ cd ~/artiq-dev
$ wget https://ftp.gnu.org/gnu/binutils/binutils-2.26.tar.bz2
$ tar xvf binutils-2.26.tar.bz2
$ rm binutils-2.26.tar.bz2
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$ mkdir build
$ cd build
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$ ../configure --target=or1k-linux --prefix=/usr/local
$ make -j4
$ sudo make install
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.. note::
We're using an ``or1k-linux`` target because it is necessary to enable
shared library support in ``ld``, not because Linux is involved.
* Install LLVM and Clang: ::
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$ cd ~/artiq-dev
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$ git clone https://github.com/openrisc/llvm-or1k
$ cd llvm-or1k/tools
$ git clone https://github.com/openrisc/clang-or1k clang
$ cd ..
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$ mkdir build
$ cd build
$ cmake .. -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr/local/llvm-or1k -DLLVM_TARGETS_TO_BUILD="OR1K;X86" -DLLVM_ENABLE_ASSERTIONS=ON
$ make -j4
$ sudo make install
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.. note::
Compilation of LLVM can take more than 30 min on some machines.
Preparing the core device FPGA board
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
These steps are required to generate gateware bitstream (``.bit``) files, build the MiSoC BIOS and ARTIQ runtime, and flash FPGA boards. If the board is already flashed, you may skip those steps and go directly to `Installing the host-side software`.
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* Install the FPGA vendor tools (i.e. Xilinx ISE and/or Vivado):
* Get Xilinx tools from http://www.xilinx.com/support/download/index.htm. ISE can build gateware bitstreams both for boards using the Spartan-6 (Pipistrello) and 7-series devices (KC705), while Vivado supports only boards using 7-series devices.
* The Pipistrello is supported by Webpack, the KC705 is not.
* During the Xilinx toolchain installation, uncheck ``Install cable drivers`` (they are not required as we use better and open source alternatives).
* Install Migen: ::
$ cd ~/artiq-dev
$ git clone https://github.com/m-labs/migen
$ cd migen
$ python3.5 setup.py develop --user
.. note::
The options ``develop`` and ``--user`` are for setup.py to install Migen in ``~/.local/lib/python3.5``.
.. _install-flash-proxy:
* Install the required flash proxy gateware bitstreams:
The purpose of the flash proxy gateware bitstream is to give programming software fast JTAG access to the flash connected to the FPGA.
* Pipistrello and KC705:
::
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$ cd ~/artiq-dev
$ wget https://raw.githubusercontent.com/jordens/bscan_spi_bitstreams/master/bscan_spi_xc7k325t.bit
$ wget https://raw.githubusercontent.com/jordens/bscan_spi_bitstreams/master/bscan_spi_xc6slx45.bit
Then move both files ``~/artiq-dev/bscan_spi_xc6slx45.bit`` and ``~/artiq-dev/bscan_spi_xc7k325t.bit`` to ``~/.migen``, ``/usr/local/share/migen``, or ``/usr/share/migen``.
* :ref:`Download and install OpenOCD <install-openocd>`.
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* Download and install MiSoC: ::
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$ cd ~/artiq-dev
$ git clone --recursive https://github.com/m-labs/misoc
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$ cd misoc
$ python3.5 setup.py develop --user
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* Download and install ARTIQ: ::
$ cd ~/artiq-dev
$ git clone --recursive https://github.com/m-labs/artiq
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$ cd artiq
$ python3.5 setup.py develop --user
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.. note::
If you have any trouble during ARTIQ setup about ``pygit2`` installation,
refer to the section dealing with
:ref:`installing the host-side software <installing-the-host-side-software>`.
* Build the gateware bitstream, BIOS and runtime by running:
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::
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$ cd ~/artiq-dev
$ export PATH=/usr/local/llvm-or1k/bin:$PATH
.. note:: Make sure that ``/usr/local/llvm-or1k/bin`` is first in your ``PATH``, so that the ``clang`` command you just built is found instead of the system one, if any.
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* For Pipistrello::
$ python3.5 -m artiq.gateware.targets.pipistrello
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* For KC705::
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$ python3.5 -m artiq.gateware.targets.kc705 -H nist_qc1 # or nist_qc2
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.. note:: Add ``--toolchain vivado`` if you wish to use Vivado instead of ISE.
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* Then, gather the binaries and flash them: ::
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$ mkdir binaries
$ cp misoc_nist_qcX_<board>/gateware/top.bit binaries
$ cp misoc_nist_qcX_<board>/software/bios/bios.bin binaries
$ cp misoc_nist_qcX_<board>/software/runtime/runtime.fbi binaries
$ cd binaries
$ artiq_flash -d . -t <board>
.. note:: The `-t` option specifies the board your are targeting. Available options are ``kc705`` and ``pipistrello``.
* Check that the board boots by running a serial terminal program (you may need to press its FPGA reconfiguration button or power-cycle it to load the gateware bitstream that was newly written into the flash): ::
$ flterm /dev/ttyUSB1
MiSoC BIOS http://m-labs.hk
[...]
Booting from flash...
Loading xxxxx bytes from flash...
Executing booted program.
ARTIQ runtime built <date/time>
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.. note:: flterm is part of MiSoC. If you installed MiSoC with ``setup.py develop --user``, the flterm launcher is in ``~/.local/bin``.
The communication parameters are 115200 8-N-1. Ensure that your user has access
to the serial device (``sudo adduser $USER dialout`` assuming standard setup).
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.. _installing-the-host-side-software:
Installing the host-side software
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
* Install the llvmlite Python bindings: ::
$ cd ~/artiq-dev
$ git clone https://github.com/m-labs/llvmlite
$ cd llvmlite
$ git checkout artiq
$ LLVM_CONFIG=/usr/local/llvm-or1k/bin/llvm-config python3.5 setup.py install --user
* Install ARTIQ: ::
$ cd ~/artiq-dev
$ git clone --recursive https://github.com/m-labs/artiq # if not already done
$ cd artiq
$ python3.5 setup.py develop --user
.. note::
If you have any trouble during ARTIQ setup about ``pygit2`` installation,
you can install it by using ``pip``:
On Ubuntu 14.04::
$ python3.5 `which pip3` install --user pygit2==0.19.1
On Ubuntu 14.10::
$ python3.5 `which pip3` install --user pygit2==0.20.3
On Ubuntu 15.04 and 15.10::
$ python3.5 `which pip3` install --user pygit2==0.22.1
The rationale behind this is that pygit2 and libgit2 must have the same
major.minor version numbers.
See http://www.pygit2.org/install.html#version-numbers
* Build the documentation: ::
$ cd ~/artiq-dev/artiq/doc/manual
$ make html
Configuring the core device
---------------------------
This should be done after either installation method (conda or source).
.. _flash-mac-ip-addr:
* Set the MAC and IP address in the :ref:`core device configuration flash storage <core-device-flash-storage>`:
* You can either set it by generating a flash storage image and then flash it: ::
$ artiq_mkfs flash_storage.img -s mac xx:xx:xx:xx:xx:xx -s ip xx.xx.xx.xx
$ artiq_flash -f flash_storage.img proxy storage start
* Or you can set it via the runtime test mode command line
* Boot the board.
* Quickly run flterm (in ``path/to/misoc/tools``) to access the serial console.
* If you weren't quick enough to see anything in the serial console, press the reset button.
* Wait for "Press 't' to enter test mode..." to appear and hit the ``t`` key.
* Enter the following commands (which will erase the flash storage content).
::
test> fserase
test> fswrite ip xx.xx.xx.xx
test> fswrite mac xx:xx:xx:xx:xx:xx
* Then reboot.
You should see something like this in the serial console: ::
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$ ./tools/flterm --port /dev/ttyUSB1
[FLTERM] Starting...
MiSoC BIOS http://m-labs.hk
(c) Copyright 2007-2014 Sebastien Bourdeauducq
[...]
Press 't' to enter test mode...
Entering test mode.
test> fserase
test> fswrite ip 192.168.10.2
test> fswrite mac 11:22:33:44:55:66
.. note:: The reset button of the KC705 board is the "CPU_RST" labeled button.
.. warning:: Both those instructions will result in the flash storage being wiped out. However you can use the test mode to change the IP/MAC without erasing everything if you skip the "fserase" command.
* (optional) You may also want to set ``netmask`` and ``gateway`` in the same way that you set ``ip``.
* (optional) Flash the idle kernel
The idle kernel is the kernel (some piece of code running on the core device) which the core device runs whenever it is not connected to a PC via ethernet.
This kernel is therefore stored in the :ref:`core device configuration flash storage <core-device-flash-storage>`.
To flash the idle kernel:
* Compile the idle experiment:
The idle experiment's ``run()`` method must be a kernel: it must be decorated with the ``@kernel`` decorator (see :ref:`next topic <connecting-to-the-core-device>` for more information about kernels).
Since the core device is not connected to the PC, RPCs (calling Python code running on the PC from the kernel) are forbidden in the idle experiment.
::
$ artiq_compile idle.py
* Write it into the core device configuration flash storage: ::
$ artiq_coreconfig write -f idle_kernel idle.elf
.. note:: You can find more information about how to use the ``artiq_coreconfig`` utility on the :ref:`Utilities <core-device-configuration-tool>` page.
* (optional) Flash the startup kernel
The startup kernel is executed once when the core device powers up. It should initialize DDSes, set up TTL directions, etc. Proceed as with the idle kernel, but using the ``startup_kernel`` key in ``artiq_coreconfig``.
* (optional) Select the startup clock
The core device may use either an external clock signal or its internal clock. This clock can be switched dynamically after the PC is connected using the ``external_clock`` parameter of the core device driver; however, one may want to select the clock at power-up so that it is used for the startup and idle kernels. Use one of these commands: ::
$ artiq_coreconfig write -s startup_clock i # internal clock (default)
$ artiq_coreconfig write -s startup_clock e # external clock
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.. rubric:: Footnotes
.. [1] [Linux] If your shell does not find the ``conda`` command, make sure that the conda binaries are in your ``$PATH``:
If ``$ echo $PATH`` does not show the conda directories, add them: execute ``$ export PATH=$HOME/miniconda3/bin:$PATH`` if you installed conda into ``~/miniconda3``.