 Harry Ho
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353b34a135
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implement UART, Timer, SPI Flash & Eth RGMII cores
* These implementations use Harry's proposal for nmigen-stdio & nmigen-soc
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2020-03-02 19:55:22 +08:00 |
 Sebastien Bourdeauducq
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70638e6d87
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add wishbone components
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2019-05-02 12:53:08 +08:00 |
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Sebastien Bourdeauducq
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88db84cfd7
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uart: style
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2019-05-02 12:52:29 +08:00 |
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Sebastien Bourdeauducq
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d765dfb7b9
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add __all__
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2019-05-01 17:05:19 +08:00 |
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Sebastien Bourdeauducq
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a19f0784d0
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use Elaboratable
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2019-04-26 16:57:59 +08:00 |
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Sebastien Bourdeauducq
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2bd819fcbe
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roundrobin: use nmigen zero-width signals
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2019-04-18 11:58:51 +08:00 |
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Sebastien Bourdeauducq
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e14031fba6
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add round-robin arbiter
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2019-04-17 20:18:41 +08:00 |
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Sebastien Bourdeauducq
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3dd10e6b9b
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add simple test for UART
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2019-03-28 19:39:30 +08:00 |
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Sebastien Bourdeauducq
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55e12d3185
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add component library with UART
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2019-03-19 16:52:02 +08:00 |