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artiq
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artiq
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artiq
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gateware
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Sebastien Bourdeauducq
e46ba83513
rtio/dds: use rio_phy domain to reset FTW tracker.
Closes
#120
2015-10-04 22:53:51 +08:00
..
amp
gateware/soc: use Minicon SDRAM controller and 128KB shared L2 cache
2015-06-18 12:18:03 +02:00
rtio
rtio/dds: use rio_phy domain to reset FTW tracker.
Closes
#120
2015-10-04 22:53:51 +08:00
__init__.py
artiqlib -> artiq.gateware
2015-03-08 11:00:24 +01:00
ad9xxx.py
ad9xxx: fix gpio signal length
2015-08-22 13:12:30 +08:00
nist_qc1.py
pipistrello: add notes to nist_qc1 about dds_clock
2015-06-28 20:56:12 -06:00
nist_qc2.py
qc2: DDS selection is active low
2015-08-22 11:49:38 +08:00
soc.py
gateware/soc: use Minicon SDRAM controller and 128KB shared L2 cache
2015-06-18 12:18:03 +02:00