forked from M-Labs/artiq
ad9xxx: fix gpio signal length
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parent
fba05531f4
commit
d38f1e6796
@ -55,7 +55,11 @@ class AD9xxx(Module):
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dts.oe.eq(~rx)
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]
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gpio = Signal(flen(pads.sel) + 1)
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if hasattr(pads, "sel"):
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sel_len = flen(pads.sel)
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else:
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sel_len = flen(pads.sel_n)
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gpio = Signal(sel_len + 1)
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gpio_load = Signal()
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self.sync += If(gpio_load, gpio.eq(bus.dat_w))
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if hasattr(pads, "rst"):
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