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147 Commits

Author SHA1 Message Date
linuswck 80b9848539 update flake: KiCAD_BOM_Generator 2023-12-18 16:05:12 +08:00
linuswck a2cb5ce624 sch, pcb: Add TDAC_VFB. Change 2u2 PMLCAP P/N 
- Connect TDAC voltage output through a RC LPF to MCU PC0(ADC123_IN10)
- 2u2 PMLCAP P/N is changed to 16V version instead of 35V for lower cost
 2023-12-18 16:05:08 +08:00
linuswck 7ac52b7a1b PCB: Correct Y169010R0000T9L Footprint 
- Add more space between the pin holes and resistor body
 2023-12-13 15:33:49 +08:00
linuswck 901f394ab3 Correct graphical mistakes in LTC3261 symbol 
- no functional changes
 2023-12-13 12:18:14 +08:00
linuswck ef732cf36b sch, pcb: correct polarity of LT3094xMSE C_Set 2023-12-13 11:50:50 +08:00
linuswck 6cd368a203 sch: Add SMA Jack to Plug Cable to BOM 
- Internal SMA cable connecting LD adapter and Front Panel
 2023-12-13 11:29:01 +08:00
linuswck eaea402d9c Add copper plate to LD Adapter 3D model 2023-12-13 11:29:01 +08:00
linuswck 9e1f359d78 flake: Generate prod files with flake.nix 
- Generate production files with nix build .
 2023-12-13 11:29:01 +08:00
linuswck a0c1ca1c58 pcb: Update clearance rules for JLCPCB manufacturing 
- No layout is changed. Only copper clearance and width are modified.
 2023-12-13 11:29:00 +08:00
linuswck aa8fd2c5cb sch: Update PN and Comments 2023-12-13 11:29:00 +08:00
linuswck 6d686d7170 sch: Place Y169010R Power Resistor 
- cannot find purchasable PDY10R000F Power Resistor
 2023-12-13 11:29:00 +08:00
linuswck 816e273b7a sch: Add JLCPCB M3 x 8 Screws PN 2023-12-13 11:29:00 +08:00
linuswck b0e798a83e sch: Set the mcu 2.54mm Prog HDR to be placed 2023-12-13 11:29:00 +08:00
linuswck 19a860fbb4 sch: Specify AD5680 MFR_PN to be -1 variant 2023-12-13 11:29:00 +08:00
linuswck 430a67dda4 pcb: Update Front Panel 3D Model 2023-12-13 11:29:00 +08:00
linuswck 71f2a39713 Add Front Panel Mechanical Design and Drawings 
- Complete the Assembly in FreeCAD
- Add Technical Drawings, Assembly Drawings, 3D model for production
- Update text markings on KiCad
 2023-12-13 11:28:56 +08:00
linuswck 3b7fbdb2be pcb: Update PN and properties of symbols 2023-11-30 16:14:59 +08:00
linuswck 8b3d5d8e44 sch: Not to include TPs in BOM. Add prod comments 
- LTC6655 Vref adds production comments
 2023-11-30 16:14:59 +08:00
linuswck 83bd5e9a03 Front Panel: Relocate markings to diff layers 
- Move the markings to different layers for generating prod docs
- Add comments in the drawings pdf
 2023-11-30 16:14:55 +08:00
linuswck cc64790270 pcb: relocate programming hdrs 
- prev locations block Internal SMA cable
 2023-11-30 14:55:15 +08:00
linuswck 56ef8302a7 sch: Correct Front Panel Kit MRF/PN & Value typo 2023-11-30 14:53:01 +08:00
linuswck 007ba75003 pcb: Add GND and via fencing for Mod_IN signal 2023-11-30 11:28:18 +08:00
linuswck 401802709e pcb: Relocate programming hdrs to an accessible place 
- Even after the MCU EXT mezzanine is installed
 2023-11-30 11:11:17 +08:00
linuswck 66b6cd28d5 sch: Add install Instructions for Power Resistor 2023-11-30 11:10:20 +08:00
linuswck c053eca22a Add Manufacturer into PM1202's Value & Comment 2023-11-29 16:37:35 +08:00
linuswck 76480a3679 Add Front Panel MFR_PN 2023-11-29 16:32:18 +08:00
linuswck 08133e5e95 sch, pcb: Add TAN Caps to all LT304x SET Pin 
- Prevent noise due to microphonics to be amplified by internal Amp
- Remove the input TAN Caps as LT304x PSRR is very good
- Replace TAN Caps in the 12V input side to be ELEC Cap
    - Save cost
 2023-11-29 15:06:26 +08:00
linuswck 74524b70e4 Scripts: Grab correct KICAD7_3DMODEL_DIR now 
- Todo: Use default.nix or flake.nix to setup the path
 2023-11-29 15:05:47 +08:00
linuswck 13720b3ccc Reassign Reference Designators for all Symbols 2023-11-29 10:47:38 +08:00
linuswck f558f62313 sch: Add Mounting Screw Symbol and MFR/PN 2023-11-29 10:47:16 +08:00
linuswck a8ac943190 Cleanup and Update Modification Date 2023-11-28 11:44:52 +08:00
linuswck 2612acc9f7 Scripts: Comment Filed is included in the BOM 2023-11-28 10:42:26 +08:00
linuswck 06a00befeb 3D: Update 3D models of KIrdy LD Adapter 2023-11-28 10:42:26 +08:00
linuswck 1b7940871b sch, pcb: Add 12V & Mounting holes to MCU EXT HDR 2023-11-28 10:42:20 +08:00
linuswck 83506fd3c6 sch, pcb: add tantalum C0G Caps for 8V out LT3045 2023-11-27 17:37:52 +08:00
linuswck f24f037348 sch, pcb: Change kirdy LD adpter connectors 
- Add two extra mounting holes for kirdy LD adapter
- Update kirdy LD adapter 3D model
- Update the PCB layout accordingly
 2023-11-27 17:37:52 +08:00
linuswck 95494ee031 sch, pcb: Add LPF and Buffer for TEC VREF 2023-11-27 17:37:52 +08:00
linuswck e7a7eee202 sch, pcb: Remove X7R, X5R at input LT304x 
- Reduce the number of Tantalum Capacitor Used
- Replace some non critical ones with Electrolytic Caps
 2023-11-27 17:37:52 +08:00
linuswck f29c460e72 Add: Footprints and Step Model for Caps 
- SMD ELEC: 865080345012
- SMD C0G Ceramic GRMJN65C1H104JE01J
 2023-11-27 17:37:52 +08:00
linuswck 5f7743698e pcb: Add reference designators for connectors, SWs 
- SMA Connector, USB Type C, Power Jack, RJ45
- MCU Programming Headers and Boot 0 Headers
- Termination Resistor SW, Modulation Depth SW
 2023-11-27 17:37:52 +08:00
linuswck 43903708c3 sch, pcb: Replace FB of -6V +15V LDO with inductor 
- Build a Pi LPF on the input side
 2023-11-27 17:37:52 +08:00
linuswck 24637b4216 sch, pcb: Add alternate footprint for LTC6655 Vref 2023-11-27 17:37:52 +08:00
linuswck 2cbab29c4e sch, pcb: Add LEDs and TPs to Critical Power Rails 2023-11-27 17:37:52 +08:00
linuswck c59eccaa7d sch, pcb: add 0R for TEC Vref Ouput 
- For debugging if needed
 2023-11-27 17:37:52 +08:00
linuswck db54e6cfa8 sch, pcb:Edit PCB shape for connectors to protrude 
- Connectors now protrude the front panel
- Align the connectors by the outline generated from 3D Model
- Update the front panel symbol to include the two mounting holes
 2023-11-27 17:37:52 +08:00
linuswck e0989a61f2 Add Front Panel FreeCAD Assembly 
- Static Handle
- PCB Brackets
- Kirdy Front Panel Cutout
 2023-11-27 17:37:47 +08:00
linuswck 13a90dd642 3D_Model: Update 204-121ST 2023-11-21 11:46:48 +08:00
linuswck b901f84d0a sch, pcb: Add PWR, POE_PWR netclasses 2023-11-21 11:46:46 +08:00
linuswck 20198f5eab drc: Check PWR nets clearance on pri and sec sides 
- Pri: PoE PWR nets
- Sec: PWR nets like GND, 3V3 etc
 2023-11-21 11:46:39 +08:00
linuswck 47a30da9b1 Port front panel markings design to Kicad 
- Front panel text markings can now be modified with Kicad
 2023-11-17 15:57:55 +08:00