pcb: Update clearance rules for JLCPCB manufacturing
- No layout is changed. Only copper clearance and width are modified.
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kirdy.kicad_pcb
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kirdy.kicad_pcb
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@ -66,7 +66,14 @@
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"width": 0.117348
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}
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],
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"drc_exclusions": [],
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"drc_exclusions": [
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"hole_clearance|130350000|24000000|83553730-2413-4ad6-a317-ed776b3a8021|4e60be3e-79a4-41df-901a-326dc28e1f86",
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"hole_clearance|158600000|24000000|c8e5c519-46e1-4ce1-a316-abb8969a411e|cc3dd9cf-30f4-44ad-a78d-6e534b4f5e2c",
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"hole_clearance|158600000|76000000|0c452fd4-1270-4819-ab06-9c83d7cb07ba|e1d5bbe3-dca9-4fd4-aa90-fa7cb3a52dd6",
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"solder_mask_bridge|130332340|24308208|83553730-2413-4ad6-a317-ed776b3a8021|4e60be3e-79a4-41df-901a-326dc28e1f86",
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"solder_mask_bridge|130332340|76308208|6f270bc4-4133-428d-8b4f-df173b059340|fe51fc4a-61a2-4622-8c9f-962e914f266e",
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"solder_mask_bridge|158582340|76308208|0c452fd4-1270-4819-ab06-9c83d7cb07ba|e1d5bbe3-dca9-4fd4-aa90-fa7cb3a52dd6"
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],
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"meta": {
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"version": 2
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},
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@ -124,10 +131,10 @@
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"allow_blind_buried_vias": false,
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"allow_microvias": false,
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"max_error": 0.005,
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"min_clearance": 0.08889999999999999,
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"min_clearance": 0.09,
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"min_connection": 0.0,
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"min_copper_edge_clearance": 0.25,
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"min_hole_clearance": 0.19999999999999998,
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"min_copper_edge_clearance": 0.3,
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"min_hole_clearance": 0.254,
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"min_hole_to_hole": 0.254,
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"min_microvia_diameter": 0.19999999999999998,
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"min_microvia_drill": 0.09999999999999999,
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@ -136,7 +143,7 @@
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"min_text_height": 0.7999999999999999,
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"min_text_thickness": 0.08,
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"min_through_hole_diameter": 0.19999999999999998,
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"min_track_width": 0.08889999999999999,
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"min_track_width": 0.09,
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"min_via_annular_width": 0.09999999999999999,
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"min_via_diameter": 0.39999999999999997,
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"solder_mask_clearance": 0.0,
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@ -440,7 +447,7 @@
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"classes": [
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{
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"bus_width": 12,
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"clearance": 0.0889,
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"clearance": 0.09,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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@ -457,7 +464,7 @@
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},
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{
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"bus_width": 12,
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"clearance": 0.0889,
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"clearance": 0.09,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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@ -474,7 +481,7 @@
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},
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{
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"bus_width": 12,
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"clearance": 0.0889,
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"clearance": 0.09,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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