Commit Graph

26 Commits (master)

Author SHA1 Message Date
mikelam 7a0fa5ce04 add TPS2590 to make 3v3_MP output controllable and limit current; update 12v output current limit to 1A 2022-02-13 17:34:38 +08:00
Jack-Zheng d02478566d PCB: replace ice40 package with default library BGA256 2021-07-23 17:04:50 +08:00
Jack-Zheng 22cd0f4c9d PCB: fix logo resolution issue, fix AG5300 module pin bug, update crystal package, add SMT positioning hole; FabricationOutput: add SMT position and BOM file 2021-07-14 14:33:32 +08:00
Jack-Zheng 09ebd078c2 CurrentSenser: connect reference voltage to MCU ADC 2021-07-10 13:19:05 +08:00
Jack-Zheng 66d7d68a55 CurrentSense, HSADC: add decoupling caps; Power: add 3.3V output fuse; HSADC: add ESD protection; PCB: add logo 2021-07-09 20:18:06 +08:00
Jack-Zheng 3a06817165 CurrentSense: connect FAULT signal to MCU 2021-07-09 16:07:40 +08:00
Jack-Zheng 191eacdf8c HSADC: change from AC coupling to DC coupling; PCB: finish HSADC layout; LVDS&IO: fix name issue 2021-07-09 14:36:13 +08:00
Jack-Zheng 2a31c8b3f3 PCB: finish LVDS routing 2021-06-24 15:43:31 +08:00
Jack-Zheng 6535ff5423 LVDS&IO: add fpga flash config; all: fix connection bugs; PCB: initialize component positions and layout 2021-06-22 16:34:02 +08:00
Jack-Zheng b740887ac2 HighSpeedADC: fix chip rotation bug, remove SMA connector; all: fix BJT base resistors; Power: remove DC jack; LVDS&IO: replace IDC header with dupont 2021-06-21 17:06:36 +08:00
Jack-Zheng 9bcc9a229b TestAutomation: replace messy wires with bus 2021-06-21 12:10:31 +08:00
Jack-Zheng 45940c1ac8 all: finish routing 2021-06-18 16:13:42 +08:00
Jack-Zheng 9c10edde19 CurrentSensor: add mid point voltage reference; FPGA: fix pinout 2021-06-18 14:24:15 +08:00
Jack-Zheng 0cebd6ed2b LVDS: add LVDS ports; all: add LEDs 2021-06-18 11:30:16 +08:00
Jack-Zheng 74f4fc201a FPGA: add GPIO and ADC parallel port 2021-06-18 10:27:05 +08:00
Jack-Zheng 9a62476f9e MCU: finish connectors 2021-06-17 17:33:12 +08:00
Jack-Zheng 4123caa996 all: add gitignore; remove redundant files from repo; optimize file name style 2021-06-17 15:49:24 +08:00
Jack-Zheng 6cee2d0419 Current_Senser: add current sampling; all: optimize +3.3VA 2021-06-17 15:30:51 +08:00
Jack-Zheng dfe4255a21 MCU: finish FSMC, PWM 2021-06-17 10:52:33 +08:00
Jack-Zheng fc8c667020 Power: fix hierarchical and global label 2021-06-16 17:32:33 +08:00
Jack-Zheng 5b4801ff74 FPGA: finish EEM, I2C, CFG, SPI FLASH 2021-06-16 17:32:33 +08:00
Jack-Zheng fc2cb47610 all: map symbol and footpins 2021-06-16 17:32:33 +08:00
Jack-Zheng 24471104a5 Analog_LVDS: finish ADC 2021-06-16 17:32:33 +08:00
Jack-Zheng 66188cd3ad Ethernet: finish ethernet controller and PoE input 2021-06-16 17:32:33 +08:00
Jack-Zheng 232af06c28 components confirmed; datasheet collected; framework finished 2021-06-16 17:32:32 +08:00
Jack-Zheng da19dad9cd init project 2021-06-16 17:31:36 +08:00