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artiq-zynq/src/gateware
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mwojcik ab0c205dd2 gateware: add DRTIO 
Reviewed-on: M-Labs/artiq-zynq#140
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
 		2021-10-08 16:12:30 +08:00
..
acpki.py acpki: working 2020-09-09 21:24:49 +08:00
analyzer.py analyzer: report AXI bus errors 2020-07-20 19:51:22 +08:00
dma.py dma: report AXI bus error 2020-07-21 12:47:20 +08:00
drtio_aux_controller.py gateware: add DRTIO 2021-10-08 16:12:30 +08:00
endianness.py dma: fix endianness issues 2020-07-16 17:27:08 +08:00
kasli_soc.py gateware: add DRTIO 2021-10-08 16:12:30 +08:00
test_dma.py dma: fix endianness issues 2020-07-16 17:27:08 +08:00
zc706.py gateware: add DRTIO 2021-10-08 16:12:30 +08:00