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ff0da2c9fc
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sawg: stage code for y-data exchange on channels
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2017-06-22 10:26:29 +02:00 |
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bfc224d4ba
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phaser: adjust to new jesd
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2017-05-22 19:59:53 +02:00 |
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679060af1d
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phaser: enable dma
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2017-05-22 19:32:34 +02:00 |
|
Florent Kermarrec
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79c339d4ac
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gateware/targets/phaser: jesd core now handles jsync completely
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2017-04-26 22:25:08 +02:00 |
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Florent Kermarrec
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0546affd4c
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gateware/target/phaser: jesd start signal renamed to jsync
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2017-04-26 12:27:40 +02:00 |
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|
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674bf82f3a
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gateware: add cri_con CSRs to all DMA-capable targets
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2017-04-06 01:14:09 +08:00 |
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|
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28211e0b32
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gateware: reset RTIO DMA core when kernel CPU is reset
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2017-03-31 15:35:28 +08:00 |
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a7de58b604
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rtio: Inout → InOut
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2017-03-14 14:18:55 +08:00 |
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d2f2415b50
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analyzer: use CRI and connect at RTIO core
This causes DMA events to be included in analyzer traces.
|
2017-03-02 18:47:56 +08:00 |
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|
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f017d1771f
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gateware: remove unused configs in targets (not needed with new moninj)
|
2017-02-25 12:14:56 +08:00 |
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aafefee7f5
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targets: make number of ethmac slots consistent
|
2017-02-02 23:02:51 +08:00 |
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|
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43aad0914e
|
python3.5 -> python3
Many things also work with Python 3.6.
|
2017-01-30 09:24:43 +08:00 |
|
whitequark
|
de17908b38
|
Revert "Globally update UART baudrate to 921600."
This reverts commit b29e2d5bfe.
This broke flterm firmware upload, which was the entire point
of the whole exercise.
|
2017-01-25 00:31:28 +00:00 |
|
whitequark
|
b29e2d5bfe
|
Globally update UART baudrate to 921600.
|
2017-01-24 22:25:58 +00:00 |
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|
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28a41a2f60
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gateware: fix aeb1ba847
|
2017-01-18 17:11:02 -06:00 |
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|
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b40953800a
|
gateware: soc -> amp.soc
|
2017-01-18 15:28:14 -06:00 |
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|
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fe53bab953
|
targets: kc705 -> kc705_dds
|
2017-01-05 18:40:56 +01:00 |
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|
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082fdaf450
|
move i2c to libboard, do bit-banging on comms CPU
|
2017-01-04 21:04:38 +01:00 |
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|
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c08fc8aae9
|
firmware: support moninj without DDS. Closes #650
|
2017-01-04 11:26:02 +01:00 |
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|
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455250b3f9
|
remove DDS_AD9914 and DDS_ONEHOT_SEL
|
2017-01-03 22:04:25 +01:00 |
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|
|
7ff77bceac
|
move AD9616 and AD9154 initialization to firmware
|
2017-01-03 16:11:38 +01:00 |
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|
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417708af90
|
phaser: add note about DDS defines (#650)
|
2017-01-02 22:15:21 +01:00 |
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|
|
61abd994e9
|
Revert "fir: force dsp48"
This reverts commit 0ad433832d1b6dcd803ffa086ae73b2ee0568326.
|
2016-12-14 19:16:07 +01:00 |
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|
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641d109786
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fir: force dsp48
|
2016-12-14 19:16:07 +01:00 |
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|
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03d13d3811
|
phaser: dma/drtio changes
|
2016-12-12 17:46:36 +01:00 |
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|
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cbf1004df3
|
gateware/phaser -> gateware/ad9154_fmc_ebz
|
2016-12-02 14:11:41 +01:00 |
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27160f5912
|
phaser: make sysref input only for timing
|
2016-11-29 15:28:10 +01:00 |
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55e37b41ec
|
phaser: use ttl_simple.Input for sync
|
2016-11-24 15:55:26 +01:00 |
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|
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8060652913
|
phaser: use Inout_8X
|
2016-11-24 15:21:03 +01:00 |
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|
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617650f3b2
|
phaser: extract target
|
2016-11-24 15:20:51 +01:00 |
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