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Code Pull Requests Activity
3,686 Commits 14 Branches 35 Tags 23 MiB
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3686 Commits

Author SHA1 Message Date
Robert Jördens bf942fc228 ksupport: adapt to dyld_load() 2016-10-18 11:37:27 +02:00
Robert Jördens 54f05b6fc1 ksupport: kernel_run lookup with dyld (closes #590) 
adapt to misoc change
 2016-10-18 10:07:07 +02:00
Robert Jördens 78700a67bc sawg: fast-math 2016-10-18 10:05:51 +02:00
Robert Jördens b2327cf808 sawg: core is kernel_invariant 2016-10-18 10:05:51 +02:00
Sebastien Bourdeauducq b6002529cf gateware/spi: fix import 2016-10-17 14:07:11 +08:00
Robert Jördens 6a683c712b phaser: work around for unreliable transciever init 2016-10-16 16:01:23 +02:00
Florent Kermarrec 0259c80015 phaser/kc705: remove transceiver initialization workaround 2016-10-14 19:06:43 +02:00
Robert Jördens 9ba6be8796 phaser: speed up ad9154_test_status 2016-10-14 13:23:14 +02:00
Robert Jördens 4968de053c phaser: update README 2016-10-14 13:21:54 +02:00
Robert Jördens 4b4fd32e3d phaser: add another sawg demo 2016-10-14 13:21:42 +02:00
Robert Jördens d16068dd9b sawg: absolute phase updates 2016-10-14 12:42:08 +02:00
Robert Jördens 9b43f09c1d phaser: cleanup prbs 2016-10-14 11:56:10 +02:00
Robert Jördens b41b9de905 phaser: tag jesd as clock net 2016-10-14 10:46:33 +02:00
Robert Jördens 4ea3dea217 phaser: broad spectrum antibiotics with xilinx false paths 2016-10-14 10:22:03 +02:00
Robert Jördens e400f8d672 phaser: add two more registers before jesd 2016-10-14 09:54:56 +02:00
Robert Jördens 3c9c42c779 phaser: drive rtio from jesd-bufg 2016-10-14 02:26:19 +02:00
Robert Jördens b9de621557 phaser: fix comment 2016-10-14 02:18:58 +02:00
Robert Jördens 2b5a69a80c phaser: rm idle_kernel 2016-10-14 02:18:15 +02:00
Robert Jördens 808874a523 phaser: drive cd_jesd with BUFG 2016-10-14 01:57:48 +02:00
Robert Jördens 342d6d756e phaser: bypass gtx phalign 2016-10-14 00:59:53 +02:00
Robert Jördens 89150c9817 phaser: 10G line rate 2016-10-14 00:53:38 +02:00
Robert Jördens 42c6658ffe phaser: add some more blinking leds 2016-10-13 15:21:27 +02:00
Robert Jördens 6a456bd7d4 phaser: feed correct sink (crucial) 2016-10-13 15:17:38 +02:00
Robert Jördens b1137563b3 phaser: cleanup dac_setup 2016-10-13 15:02:42 +02:00
Robert Jördens 4c7c479c94 ad9154: add mirrored bits 2016-10-13 15:02:18 +02:00
Robert Jördens c8e45ae3f6 phaser: cleanup jesd phy instantiation a bit 2016-10-13 14:43:24 +02:00
Robert Jördens 01bfe54dde phaser: actually enable stpl 2016-10-13 14:09:29 +02:00
Robert Jördens 78a41eec8f phaser: kc705: syntax 2016-10-13 12:38:32 +02:00
Florent Kermarrec af0e8582a2 phaser: use new jesd clocking 2016-10-13 11:51:06 +02:00
Robert Jördens 81511feab8 phaser: README: specify versions 2016-10-12 17:13:06 +02:00
Robert Jördens 9c8b21b3f4 phaser: let link settle a bit longer before starting 2016-10-12 16:13:34 +02:00
Robert Jördens 9880b1ebd0 phaser: update README 2016-10-12 16:01:07 +02:00
Robert Jördens 0d1ed247e2 phaser: tweak sawg example 2016-10-12 16:01:07 +02:00
Robert Jördens 2d14864c6d Revert "phaser: 500 MHz dacclock" 
This reverts commit 5f737bef76.
 2016-10-12 16:01:07 +02:00
Florent Kermarrec 12b8598b84 stpl: fix byte ordering 2016-10-12 15:59:27 +02:00
Robert Jördens 9644a3a362 ad9154: mix mode addr, digital gain must be on 2016-10-12 15:00:53 +02:00
Robert Jördens 4376ef5615 phaser: slow down spi a bit 2016-10-12 14:37:43 +02:00
Robert Jördens 3f1d96b68d phaser: tweak dac_setup 2016-10-12 14:22:57 +02:00
Robert Jördens 466d1e8304 phaser: update stpl 2016-10-12 14:22:21 +02:00
Robert Jördens 5f737bef76 phaser: 500 MHz dacclock 2016-10-12 14:03:08 +02:00
Robert Jördens 3b1d5d7eb6 phaser: verify flags in dac_setup 2016-10-12 12:19:08 +02:00
Robert Jördens 1117fe191b phaser: support core stpl 2016-10-12 12:03:29 +02:00
Robert Jördens f515c11f26 phaser: fix refclk period spec 2016-10-11 20:13:34 +02:00
Robert Jördens bae5b73155 phaser: comment out stpl test 2016-10-11 19:50:19 +02:00
Robert Jördens 2b1cca2e7e phaser: stpl 2016-10-11 19:29:27 +02:00
Robert Jördens e4d1f6cf1f README_PHASER: update 2016-10-10 18:49:24 +02:00
Robert Jördens 18d18b6685 phaser: add sync ttl input for monitoring 2016-10-10 17:13:23 +02:00
Robert Jördens f5f7acc1f8 ttl_simple: add pure Input 
(no Tristate for internal signals)
 2016-10-10 17:13:23 +02:00
Robert Jördens e27228fdd5 ad9516: duty cycle correction 2016-10-10 17:13:23 +02:00
Florent Kermarrec c08caae171 phaser: use qpll 2016-10-10 17:05:42 +02:00