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Code Pull Requests Activity
953 Commits 14 Branches 35 Tags 23 MiB
Commit Graph

168 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq f124350555 runtime: disable kernel-CPU functions when kernel-CPU not present 2015-04-02 17:00:59 +08:00
Sebastien Bourdeauducq 4b66e3108a runtime: demonstrate basic inter-CPU communication 2015-04-02 16:54:08 +08:00
Sebastien Bourdeauducq 5fd7f68f48 targets/kc705: dual-CPU design 2015-04-02 16:53:57 +08:00
Yann Sionneau e9092edb98 Remove one RTIO out channel to free up some space for travis builds to succeed 2015-03-30 19:51:52 +08:00
Florent Kermarrec 494c670cd2 targets/artiq_ppro: use new sdram_controller_settings parameter 2015-03-21 23:19:16 +01:00
Robert Jördens fdca0a71ff add ARTIQMidiSoC based on pipistrello 2015-03-19 11:37:15 -06:00
Sebastien Bourdeauducq 7a1d60ee15 coredevice,runtime,language: add parameters to runtime exceptions, include information with RTIO errors 2015-03-13 14:55:18 +01:00
Sebastien Bourdeauducq 0416da8634 runtime/test: implement ttlout, clksel and dds functions 2015-03-12 13:14:06 +01:00
Sebastien Bourdeauducq 3122623c6f rtio: make 63-bit timestamp counter the default [soc] 2015-03-12 13:13:35 +01:00
Sebastien Bourdeauducq d38014b07d soc/runtime: import DDS/TTL tester (functions not accessible yet) 2015-03-11 22:02:19 +01:00
Sebastien Bourdeauducq 28bce9ee40 artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
Sebastien Bourdeauducq 15d09c0b94 runtime: use new uart tuning word function 2015-03-02 23:36:05 +00:00
Sebastien Bourdeauducq 4e5320be28 Merge branch 'master' of https://github.com/m-labs/artiq 2015-02-28 07:34:38 -07:00
Florent Kermarrec 9cf8db2f14 adapt code to MiSoC's changes 2015-02-28 07:34:11 -07:00
Sébastien Bourdeauducq 7028d85255 targets/ppro: disable L2 2015-02-27 18:02:21 -07:00
Joe Britton 0127de9bb5 soc: add_cpu_csr_region -> add_csr_region 2015-02-27 15:02:28 -07:00
Sebastien Bourdeauducq 61f33a9a04 soc/ad9858: do not put code in __init__.py 2015-02-26 23:31:43 -07:00
Sebastien Bourdeauducq da917f768e initial kc705 support 2015-02-26 21:50:52 -07:00
Sebastien Bourdeauducq f7232fd3d1 support exceptions raised by RPCs 2014-12-20 21:33:22 +08:00
Sebastien Bourdeauducq 0d10ae7580 rpc: support all data types as parameters 2014-12-19 12:46:24 +08:00
Sebastien Bourdeauducq 059608d1fd dds: fix phase modes 2014-12-09 13:50:33 +08:00
Sebastien Bourdeauducq fc690ead75 runtime: support clock switching 2014-12-02 14:06:32 +08:00
Sebastien Bourdeauducq 94218f785e comm_serial: cleanup 2014-12-02 11:09:02 +08:00
Yann Sionneau 20adb57140 comm_serial: allow to use dynamic baudrate 2014-12-02 10:42:14 +08:00
Sebastien Bourdeauducq c591f1a74d targets/ARTIQMiniSoC: support dynamic switching of RTIO clock to XTRIG 2014-12-01 18:53:29 +08:00
Sebastien Bourdeauducq cd587e4f12 rtio: do housekeeping in gateware 2014-12-01 17:32:36 +08:00
Sebastien Bourdeauducq 99d530e498 targets/ARTIQMiniSoC: remove 2 TTL channels to make room in FPGA 2014-12-01 17:31:35 +08:00
Sebastien Bourdeauducq 50e0bf3280 rtio: optimize flag handling 2014-12-01 14:29:50 +08:00
Sebastien Bourdeauducq 572eecc57b rtio: stricter upper bound on guard time to avoid race condition 2014-12-01 14:27:03 +08:00
Sebastien Bourdeauducq 7166ca82d1 targets/ARTIQMiniSoC: map RTIO CSRs directly on Wishbone (reduces programming time by 30%) 2014-11-30 22:31:55 +08:00
Sebastien Bourdeauducq 1f6441948d more TTL channels and larger input FIFOs on Papilio Pro 2014-11-30 15:50:57 +08:00
Sebastien Bourdeauducq e5286c57ab rtio: fix input FIFO depth config 2014-11-30 12:12:35 +08:00
Sebastien Bourdeauducq bf745e53c9 rtio: register FIFO output to improve timing 2014-11-30 10:51:12 +08:00
Sebastien Bourdeauducq dda4002ae1 rtio/phy: fix input synchronization 2014-11-30 10:50:48 +08:00
Sebastien Bourdeauducq c78c5a2b4f rtio: fix guard cycle computation 2014-11-30 01:00:52 +08:00
Sebastien Bourdeauducq 39c4b5416f targets/ARTIQMiniSoC: 125MHz RTIO clocking 2014-11-30 01:00:27 +08:00
Sebastien Bourdeauducq 9aafe89518 rtio: use Record 2014-11-30 00:59:39 +08:00
Sebastien Bourdeauducq 901073acf3 asynchronous RTIO 2014-11-30 00:13:54 +08:00
Sebastien Bourdeauducq 44ec3eae3d soc/target: use minicon by default 2014-11-28 10:21:43 +08:00
Sebastien Bourdeauducq 65567e1201 soc/target: remap RTIO to avoid conflict with Ethernet MAC+PHY 2014-11-21 15:51:51 -08:00
Sebastien Bourdeauducq dfd779c7c5 core: add underflow recovery function 2014-11-20 12:38:52 -08:00
Sebastien Bourdeauducq 1780759327 dds: phase control (mostly untested) 2014-11-20 12:32:56 -08:00
Sebastien Bourdeauducq 17f5a31320 runtime/dds: fix reset glitches 2014-11-15 11:23:23 -07:00
Sebastien Bourdeauducq 5105b88302 rtio: raise input overflow exception 2014-10-21 23:41:02 +08:00
Sebastien Bourdeauducq 9a14081031 rtio: add pileup count reporting 2014-10-21 23:14:01 +08:00
Sebastien Bourdeauducq 346cca9e90 soc/target: remap RTIO to avoid conflict with spiflash and ddrphy in MiSoC 2014-10-21 18:40:08 +08:00
Sebastien Bourdeauducq 61a50ee53c reorganize for devices/controllers 2014-10-19 23:51:49 +08:00
Sebastien Bourdeauducq 0c9632d71b runtime/exception_raise: never return 2014-10-15 16:11:28 +08:00
Sebastien Bourdeauducq d22c30650d rtio: add timestamp function 2014-10-14 15:54:10 +08:00
Sebastien Bourdeauducq 7d48ef263a soc/runtime: fix RTIO sequence error detection on FUD 2014-10-14 12:47:04 +08:00
Sebastien Bourdeauducq 1c24a5971b rtio: error recovery 2014-10-10 20:12:22 +08:00
Sebastien Bourdeauducq 53b259b9a0 soc/runtime/dds: fix FUD sequence error detection 2014-10-05 10:34:32 +08:00
Sebastien Bourdeauducq 5d8c53abb3 soc/runtime/exceptions: do not crash when exception is raised with no handler 2014-10-05 10:33:27 +08:00
Sebastien Bourdeauducq 76fed11d59 rtio: raise RTIOSequenceError exceptions when events are not submitted in-order 2014-09-30 19:32:11 +08:00
Sebastien Bourdeauducq e263b63527 soc/runtime: raise underflow exception for replace and DDS FUD operations 2014-09-26 17:24:45 +08:00
Sebastien Bourdeauducq af0cd902d3 get frequency from RTIO, support fractional frequencies 2014-09-26 17:24:06 +08:00
Sebastien Bourdeauducq f4d6bfc094 soc/runtime: raise exception on RTIO underflow 2014-09-25 12:55:50 +08:00
Sebastien Bourdeauducq 378ca64193 soc/runtime/exception: fix eid bug 2014-09-25 12:55:22 +08:00
Sebastien Bourdeauducq 538aaa4c14 rtio: fix o_error csr size 2014-09-25 12:54:26 +08:00
Sebastien Bourdeauducq 1b81fc8a8f soc/runtime: cleanup/simplify exception_longjmp 2014-09-24 00:00:10 +08:00
Sebastien Bourdeauducq af15f45bb9 runtime: do not use buggy llvm.eh.sjlj.* intrinsics 2014-09-23 22:09:08 +08:00
Sebastien Bourdeauducq 0a02d9fb78 soc/runtime: add levels to exception_pop 2014-09-23 16:22:32 +08:00
Sebastien Bourdeauducq ec7a92983d soc/runtime: provide exception handling services 2014-09-22 13:19:26 +08:00
Sebastien Bourdeauducq b37ceb328f soc/runtime: fix use of setjmp 2014-09-22 13:18:48 +08:00
Sebastien Bourdeauducq 3de24619b2 corecom: exception support 2014-09-21 23:36:10 +08:00
Sebastien Bourdeauducq 0c9f05dc80 soc/runtime: add exception management functions 2014-09-21 23:32:14 +08:00
Sebastien Bourdeauducq d52d641dcd soc/runtime/services: add alternative names for comparedf2 routines 2014-09-18 09:36:06 +08:00
Sebastien Bourdeauducq f0f65ba3a7 soc/target: add optional test signal generator 2014-09-17 19:53:55 +08:00
Sebastien Bourdeauducq 9b8a91e67e rtio: increase FIFO sizes 2014-09-17 19:53:29 +08:00
Sebastien Bourdeauducq d8b9543e1b rtio: use FWFT FIFO with no buffering. This fixes replace operations. 2014-09-17 19:53:06 +08:00
Sebastien Bourdeauducq 040fa0e02a runtime: blink LED at startup 2014-09-15 22:56:23 +08:00
Sebastien Bourdeauducq 11d8840277 runtime: new serial protocol, support multiple entry points and log messages 2014-09-15 22:40:33 +08:00
Sebastien Bourdeauducq f529361c8b runtime: add rtio_oe and rtio_get syscalls 2014-09-14 23:30:33 +08:00
Sebastien Bourdeauducq b207a3cef5 rtio: remove ISE bug workaround 2014-09-12 16:15:32 +08:00
Sebastien Bourdeauducq 6861d28d2d runtime: support arbitrarily long initial DDS setup time 2014-09-12 15:40:34 +08:00
Sebastien Bourdeauducq 16b2d9f177 runtime: support real-time FUD 2014-09-12 15:34:11 +08:00
Sebastien Bourdeauducq 813bc90194 rtio: support readout of counter from software 2014-09-12 15:27:40 +08:00
Sebastien Bourdeauducq 10d796e026 runtime: add rtio_replace syscall 2014-09-11 23:14:45 +08:00
Sebastien Bourdeauducq 2c0b6ff4cc soc/target: connect FUD to RTIO 2014-09-11 23:11:22 +08:00
Sebastien Bourdeauducq 7efc28ede1 soc/ad9858: do not drive FUD by default 2014-09-11 23:11:00 +08:00
Sebastien Bourdeauducq 1b58e1510d soc/rtio: mini-channels 2014-09-11 23:09:43 +08:00
Sebastien Bourdeauducq 202284d44c soc/rtio: software-controlled replace 2014-09-11 23:09:20 +08:00
Sebastien Bourdeauducq 800096f9a0 soc/runtime: fix DDS reset 2014-09-11 19:25:55 +08:00
Sebastien Bourdeauducq a158b87d9f rtio: collapse zero-length intervals 2014-09-10 21:21:02 +08:00
Sebastien Bourdeauducq a580d44007 rtio: ignore series of writes with the same value and add pileup detection 2014-09-09 22:02:17 +08:00
Sebastien Bourdeauducq 3d8159ceb5 soc/runtime: find ELF entry point 
This allows multiple functions to be defined, with the main one not necessarily starting at 0.
 2014-09-07 17:30:35 +08:00
Sebastien Bourdeauducq 15dcf3351b py2llvm: move GCD function into LLVM IR 2014-09-07 14:46:32 +08:00
Sebastien Bourdeauducq 66af70bfe0 soc/runtime: resolve compiler_rt symbols in kernel 2014-09-05 17:50:24 +08:00
Sebastien Bourdeauducq 8d7591dfcf more PEP8 2014-09-05 17:06:41 +08:00
Sebastien Bourdeauducq 4915b4b5aa PEP8 2014-09-05 12:03:22 +08:00
Sebastien Bourdeauducq a579b105b6 soc/runtime: split main.c, add gcd64 2014-08-28 16:56:48 +08:00
Sebastien Bourdeauducq 7a90f4f4ec runtime: start RTIO counter at first rtio_set 2014-08-18 23:46:58 +08:00
Sebastien Bourdeauducq 7d8dc4ef30 runtime: support 64-bit RTIO timestamps 2014-08-18 23:41:54 +08:00
Sebastien Bourdeauducq 1ed808e848 soc/target: share base PPro design with MiSoC 2014-08-03 12:26:15 +08:00
Sebastien Bourdeauducq 9e4bc35354 soc/rtio: input support 2014-07-25 16:23:35 -06:00
Sebastien Bourdeauducq 6b6b44b924 soc/rtio: mux OE 2014-07-25 11:09:26 -06:00
Sebastien Bourdeauducq f03ae5e5b0 soc/rtio: separate PHY, add OE and fine timestamp in FIFO 2014-07-24 23:50:20 -06:00
Sebastien Bourdeauducq f390e9a7d1 corecom_serial: add CRC for kernel 2014-07-23 19:12:22 -06:00
Sebastien Bourdeauducq 06cc9302f8 soc/runtime: fix DDS programming 2014-07-23 17:10:49 -06:00
Sebastien Bourdeauducq ba088614d8 runtime: add dds_program 2014-07-23 11:49:48 -06:00