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44277c5b7e
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conda: bump migen/misoc
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2018-03-11 10:11:42 +08:00 |
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a04bd5a4fd
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spi2: xfers take one more cycle until ~busy
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2018-03-09 20:48:17 +01:00 |
|
Florent Kermarrec
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5af4609053
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libboard/sdram: limit write leveling scan to "512 - initial dqs taps delay" on ultrascale
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2018-03-09 19:06:47 +01:00 |
|
Florent Kermarrec
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a95cd423cc
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libboard/sdram: add gap for write leveling
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2018-03-09 18:53:57 +01:00 |
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fc3d97f1f7
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drtio: remove spurious multichannel transceiver clock constraints
They used to cause (otherwise harmless) Vivado critical warnings.
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2018-03-09 22:46:27 +08:00 |
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caf7b14b55
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kasli: generate fine RTIO clock in DRTIO targets, separate RTIO channel code
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2018-03-09 22:36:16 +08:00 |
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e65e2421a3
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conda: bump migen/misoc
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2018-03-09 22:35:40 +08:00 |
|
Florent Kermarrec
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8f6f83029c
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libboard/sdram: add write/read leveling scan
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2018-03-09 13:50:51 +01:00 |
|
Florent Kermarrec
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b0b13be23b
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libboard/sdram: rename read_delays to read_leveling
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2018-03-09 09:23:20 +01:00 |
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3fbcf5f303
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drtio: remove TSC correction (#40)
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2018-03-09 10:36:17 +08:00 |
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e38187c760
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drtio: increase default underflow margin. Closes #947
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2018-03-09 00:49:24 +08:00 |
|
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37f5f0d38d
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examples: add DMA to Sayma DRTIO
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2018-03-09 00:49:24 +08:00 |
|
Florent Kermarrec
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8475c21c46
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firmware/libboard/sdram: kusddrphy now use time mode for odelaye3/idelaye3, now reloading dqs delay_value (500ps) with software
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2018-03-08 10:00:00 +01:00 |
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8bd15d36c4
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drtio: fix error CSR edge detection (#947)
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2018-03-08 16:28:25 +08:00 |
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0adbbd8ede
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drtio: reset aux packet gateware after locking to recovered clock
Closes #949
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2018-03-08 15:41:13 +08:00 |
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8bd85caafb
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examples: fix Sayma DRTIO ref_period
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2018-03-08 15:09:33 +08:00 |
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37ec97eb28
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ad9910/2: add sw invariant only when passed
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2018-03-07 21:32:59 +01:00 |
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82831a85b6
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kasli/opticlock: add eem6 phys
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2018-03-07 21:32:59 +01:00 |
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5cc1d2a1d3
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conda: bump migen, misoc
* flterm leak
* kasli version
* sayma ddram
* ethernet clocking
* fifo dout reset_less
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2018-03-07 17:17:30 +01:00 |
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3a6566f949
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rtio: judicious spray with reset_less=True
Hoping to reduce rst routing difficulty and easier RTIO timing closure.
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2018-03-07 14:57:18 +00:00 |
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b0282fa855
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spi2: reset configuration in rio_phy
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2018-03-07 14:42:11 +00:00 |
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7afb23e8be
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runtime: demote dropped and malformed packets msgs to debug
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2018-03-07 14:28:21 +01:00 |
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4af7600b2d
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Revert "LaneDistributor: try equivalent spread logic"
This reverts commit 8b70db5f17 .
Just a shot into the dark.
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2018-03-07 11:34:51 +00:00 |
|
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a6d1b030c1
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RTIO: use TS counter in the correct CD
artiq/m-labs#938
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2018-03-07 11:34:42 +00:00 |
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8b70db5f17
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LaneDistributor: try equivalent spread logic
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2018-03-07 11:34:42 +00:00 |
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2cbd597416
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LaneDistributor: style and signal consolidation [NFC]
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2018-03-07 11:34:42 +00:00 |
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916197c4d7
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siphaser: cleanup
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2018-03-07 11:15:44 +08:00 |
|
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74d1df3ff0
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firmware: implement si5324 skew calibration
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2018-03-07 10:57:30 +08:00 |
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f7aba6b570
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siphaser: fix phase_shift_done CSR
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2018-03-07 10:57:30 +08:00 |
|
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acfd9db185
|
siphaser: minor cleanup
|
2018-03-07 10:57:30 +08:00 |
|
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e6e5236ce2
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firmware: fix si5324 select_recovered_clock
|
2018-03-07 10:57:30 +08:00 |
|
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7d98864b31
|
sayma: enable siphaser
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2018-03-07 10:57:30 +08:00 |
|
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c2d2cc2d72
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runtime: fix setup_si5324_as_synthesizer
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2018-03-07 10:57:30 +08:00 |
|
|
a6e29462a8
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sayma: enable multilink DRTIO
|
2018-03-07 10:57:30 +08:00 |
|
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c34d00cbc9
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drtio: implement Si5324 phaser gateware and partial firmware support
|
2018-03-07 10:57:30 +08:00 |
|
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994ceca9ff
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sayma_amc: disable slave fpga gateware loading
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2018-03-06 17:27:43 +01:00 |
|
|
f4dad87fd9
|
coredevice: add pcf8574a driver
I2C IO expander with 8 quasi-bidirectional pins
|
2018-03-06 14:27:19 +01:00 |
|
|
62af7fe2ac
|
Revert "kasli/opticlock: use plain ttls for channels 8-23"
This reverts commit bd5c222569eb68d624a5ac1e9f2542f6ee553f83.
No decrease in power consumption or improvement in timing.
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2018-03-06 14:27:19 +01:00 |
|
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fd3cdce59a
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kasli/opticlock: use plain ttls for channels 8-23
|
2018-03-06 14:27:19 +01:00 |
|
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50298a6104
|
ttl_serdes_7series: suppress diff_term in outputs
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2018-03-06 14:27:19 +01:00 |
|
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e356150ac4
|
ttl_simple: support differential io
|
2018-03-06 14:27:19 +01:00 |
|
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956098c213
|
kasli: add second urukul, make clk_sel drive optional
|
2018-03-06 14:26:27 +01:00 |
|
|
07de7af86a
|
kasli: make second eem optional in urukul
|
2018-03-06 14:26:26 +01:00 |
|
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257bef0d21
|
slave_fpga: print more info
|
2018-03-06 14:26:26 +01:00 |
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c25560baec
|
sed: more LaneDistributor comments
|
2018-03-06 20:56:35 +08:00 |
|
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f40255c968
|
sed: add comments about key points in LaneDistributor
|
2018-03-06 20:51:09 +08:00 |
|
Florent Kermarrec
|
5b3d6d57e2
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drtio/gth: power down rx on restart (seems to make link initialization reliable)
|
2018-03-06 11:49:28 +01:00 |
|
Florent Kermarrec
|
64b05f07bb
|
drtio/gth: use parameters from Xilinx transceiver wizard
|
2018-03-06 11:02:15 +01:00 |
|
Florent Kermarrec
|
45f1e5a70e
|
drtio/gth: cleanup import
|
2018-03-06 10:56:07 +01:00 |
|
|
a274af77d5
|
runtime: fix compilation without DRTIO
|
2018-03-05 00:43:42 +08:00 |
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