Commit Graph

114 Commits

Author SHA1 Message Date
1b08e65fa1 gateware/rt2wb: only input when active 2016-02-29 14:56:29 +01:00
eb01b0bfee gateware.spi: cleanup doc 2016-02-29 12:41:30 +01:00
948fefa69a gateware.spi: style 2016-02-29 11:48:29 +01:00
ad34927b0a spi: RTIO_SPI_CHANNEL -> RTIO_FIRST_SPI_CHANNEL 2016-02-29 11:35:49 +01:00
5480099f1b gateware.spi: rewrite counter bias for timing 2016-02-29 02:28:19 +01:00
9a1d6a51a4 gateware.spi: shorten counters 2016-02-29 01:51:33 +01:00
8d7e92ebae pipistrello: set RTIO_SPI_CHANNEL 2016-02-29 00:37:00 +01:00
9a881aa430 gateware.spi: simpler clk bias 2016-02-29 00:36:18 +01:00
d5893d15fb gateware.kc705: make xadc/ams an extension header 2016-02-28 22:41:17 +01:00
312e09150e kc705/clock: add spi bus for dac on ams101 2016-02-28 21:17:53 +01:00
f8732acece rtio.spi: drop unused argument 2016-02-28 21:06:20 +01:00
3b6999ac06 gateware.spi: refactor, sim verified 2016-02-28 20:40:06 +01:00
bd9ceb4e12 gateware.spi: add complete spi master logic 2016-02-27 22:47:16 +01:00
ade3eda19a gateware.pipistrello: use pmod for spi 2016-02-27 11:29:40 +01:00
e7146cc999 gateware.spi: design sketch 2016-02-26 17:03:08 +01:00
fb929c8599 gateware/spi: stubs 2016-02-26 13:11:10 +01:00
a8545fc1f7 targets/kc705: set up user_sma_gpio_n like other TTLs 2016-02-22 22:35:15 +08:00
4946a53456 Revert "targets/kc705: pre-divide input RTIO clock to improve non-50% duty cycle tolerance"
This reverts commit 04b0db1a91.
2016-02-22 17:52:40 +08:00
68891493a3 analyzer: move common to artiq.protocols
migen was still pulled in through rtio.__init__.py
2016-01-29 20:26:48 -07:00
d1119d7747 artiq_dir: move out of tools to unlink dependencies 2016-01-25 18:15:50 -07:00
cbb60337ae refactor Analyzer constants to unlink dependencies 2016-01-25 18:03:48 -07:00
2832d200f2 Merge remote-tracking branch 'm-labs/master' into ppp2
* m-labs/master:
  test/worker: update
  gui/log: display level and date information in tooltips
  master: add filename in worker log entries. Closes #226
  master: finer control of worker exception reporting. Closes #233
  conda: add artiq-kc705-nist_clock
  gateware: add QC1 docstring
  gateware: add clock target from David
  gateware: clean up and integrate QC2 modifications from Daniel
  add information about CLOCK hardware
2016-01-25 12:17:04 -07:00
8cbb60b370 Merge branch 'master' into ppp2
* master:
  add release notes/process
  targets/kc705: fix e664fe3
  targets/kc705: fix DDS_RTIO_CLK_RATIO for AD9914. Closes #238
  transforms.inferencer: give a suggestion on "raise Exception".
  pdq2/mediator: raise instances, not classes
  pdq2: wire up more of the pipeline
  doc: use actual version
  Fix formatting.
  doc: add artiq_flash
  versioneer: remote tag_prefix = v
2016-01-20 19:29:00 -07:00
18f0ee814d gateware: add QC1 docstring 2016-01-20 21:27:22 -05:00
db8ba8d6c1 gateware: add clock target from David 2016-01-20 21:23:49 -05:00
b3ba97e431 gateware: clean up and integrate QC2 modifications from Daniel 2016-01-20 21:17:19 -05:00
fa1afb7dd8 add information about CLOCK hardware 2016-01-20 21:06:02 -05:00
cb5fd08713 targets/kc705: fix e664fe3 2016-01-20 09:38:44 -05:00
e664fe38b0 targets/kc705: fix DDS_RTIO_CLK_RATIO for AD9914. Closes #238 2016-01-20 09:18:50 -05:00
57ce78c54d pipistrello: add rtio.Analyzer() 2016-01-18 19:17:44 -07:00
whitequark
9366a29483 Implement core device storage (fixes #219). 2016-01-10 13:04:55 +00:00
whitequark
577108554f Move kernel CPU address space up to 0x40800000. 2016-01-07 18:26:11 +00:00
87dd09a71c gateware: compress bitstreams 2016-01-06 15:40:28 -07:00
04b0db1a91 targets/kc705: pre-divide input RTIO clock to improve non-50% duty cycle tolerance 2015-12-29 17:00:57 +08:00
ba6c527819 gateware/targets: add RTIO log channels 2015-12-26 22:44:01 +08:00
080752092c gateware/rtio: add LogChannel 2015-12-26 22:43:28 +08:00
9ba8dfbf23 gateware/rtio/core: avoid potential python bug 2015-12-26 22:11:57 +08:00
8691f69a3c gateware/rtio/analyzer: suppress spurious initial reset messages 2015-12-21 18:32:08 +08:00
5769107936 gateware/rtio: keep counter clock domain transfer active during CSR reset 2015-12-20 22:12:34 +08:00
46f59b673f coredevice: analyzer message decoding 2015-12-20 14:34:16 +08:00
1638f0fa9b gateware/rtio/analyzer: fix event ordering 2015-12-19 17:04:30 +08:00
64ad38854b gateware/rtio/analyzer: fix exception message layout 2015-12-18 18:27:06 +08:00
59a3ea4f15 gateware/rtio/analyzer: fix bus write 2015-12-18 15:44:20 +08:00
4def561710 targets: integrate RTIO analyzer 2015-12-16 17:36:52 +08:00
afaad270cc rtio/analyzer: fix superficial mistakes 2015-12-16 17:36:36 +08:00
33860820b9 gateware/soc: use new SDRAM API call 2015-12-16 14:59:35 +08:00
bf29e8ddc6 kc705: make config[] usage consistent 2015-12-15 12:14:30 -07:00
4362f97d67 gateware/rtio/analyzer: complete, untested 2015-12-14 23:53:14 +08:00
b5f2e178f6 rtio/analyzer: message encoder 2015-12-14 00:37:08 +08:00
7886827b80 CSRConstant: also port DDS constants 2015-12-04 18:27:59 +08:00