pounder_test/src/bin/dual-iir.rs

289 lines
9.3 KiB
Rust
Raw Normal View History

#![deny(warnings)]
#![no_std]
#![no_main]
2021-01-27 02:14:23 +08:00
use stm32h7xx_hal as hal;
2021-01-27 02:14:23 +08:00
use stabilizer::hardware;
use miniconf::{minimq, Miniconf, MqttInterface};
use serde::{Deserialize, Serialize};
2021-01-28 01:15:35 +08:00
use dsp::iir;
2021-01-30 22:00:58 +08:00
use hardware::{
Adc0Input, Adc1Input, AfeGain, CycleCounter, Dac0Output, Dac1Output,
NetworkStack, SystemTimer, AFE0, AFE1,
2021-01-30 22:00:58 +08:00
};
2021-02-02 00:18:10 +08:00
const SCALE: f32 = i16::MAX as _;
// The number of cascaded IIR biquads per channel. Select 1 or 2!
const IIR_CASCADE_LENGTH: usize = 1;
#[derive(Debug, Deserialize, Miniconf, Copy, Clone)]
2021-01-28 01:15:35 +08:00
pub struct Settings {
2021-02-17 19:59:24 +08:00
afe: [AfeGain; 2],
iir_ch: [[iir::IIR; IIR_CASCADE_LENGTH]; 2],
telemetry_period_secs: u16,
}
#[derive(Serialize, Clone)]
pub struct Telemetry {
latest_samples: [i16; 2],
latest_outputs: [i16; 2],
digital_inputs: [bool; 2],
2021-01-28 01:15:35 +08:00
}
2021-02-17 19:59:24 +08:00
impl Default for Settings {
fn default() -> Self {
Self {
afe: [AfeGain::G1, AfeGain::G1],
iir_ch: [[iir::IIR::new(1., -SCALE, SCALE); IIR_CASCADE_LENGTH]; 2],
telemetry_period_secs: 10,
2021-02-17 19:59:24 +08:00
}
2021-01-28 01:15:35 +08:00
}
}
impl Default for Telemetry {
fn default() -> Self {
Self {
latest_samples: [0, 0],
latest_outputs: [0, 0],
digital_inputs: [false, false],
}
}
}
#[rtic::app(device = stm32h7xx_hal::stm32, peripherals = true, monotonic = crate::hardware::SystemTimer)]
const APP: () = {
struct Resources {
afes: (AFE0, AFE1),
adcs: (Adc0Input, Adc1Input),
dacs: (Dac0Output, Dac1Output),
2021-02-17 19:08:03 +08:00
mqtt_interface:
MqttInterface<Settings, NetworkStack, minimq::consts::U256>,
telemetry: Telemetry,
settings: Settings,
2021-02-17 19:08:03 +08:00
clock: CycleCounter,
// Format: iir_state[ch][cascade-no][coeff]
2021-02-17 19:59:24 +08:00
#[init([[[0.; 5]; IIR_CASCADE_LENGTH]; 2])]
iir_state: [[iir::Vec5; IIR_CASCADE_LENGTH]; 2],
2021-02-02 00:18:10 +08:00
#[init([[iir::IIR::new(1., -SCALE, SCALE); IIR_CASCADE_LENGTH]; 2])]
iir_ch: [[iir::IIR; IIR_CASCADE_LENGTH]; 2],
}
#[init(schedule = [telemetry])]
fn init(c: init::Context) -> init::LateResources {
// Configure the microcontroller
let (mut stabilizer, _pounder) = hardware::setup(c.core, c.device);
let mqtt_interface = {
let mqtt_client = {
minimq::MqttClient::new(
hardware::design_parameters::MQTT_BROKER.into(),
"",
stabilizer.net.stack,
)
.unwrap()
};
MqttInterface::new(
mqtt_client,
"dt/sinara/stabilizer",
Settings::default(),
)
.unwrap()
};
2021-01-31 01:57:06 +08:00
// Enable ADC/DAC events
stabilizer.adcs.0.start();
stabilizer.adcs.1.start();
stabilizer.dacs.0.start();
stabilizer.dacs.1.start();
// Start sampling ADCs.
2021-04-15 21:08:57 +08:00
stabilizer.adc_dac_timer.start();
c.schedule.telemetry(c.start).unwrap();
init::LateResources {
2021-01-31 01:57:06 +08:00
mqtt_interface,
afes: stabilizer.afes,
adcs: stabilizer.adcs,
dacs: stabilizer.dacs,
2021-02-17 19:08:03 +08:00
clock: stabilizer.cycle_counter,
settings: Settings::default(),
telemetry: Telemetry::default(),
}
}
/// Main DSP processing routine for Stabilizer.
///
/// # Note
/// Processing time for the DSP application code is bounded by the following constraints:
///
/// DSP application code starts after the ADC has generated a batch of samples and must be
/// completed by the time the next batch of ADC samples has been acquired (plus the FIFO buffer
/// time). If this constraint is not met, firmware will panic due to an ADC input overrun.
///
/// The DSP application code must also fill out the next DAC output buffer in time such that the
/// DAC can switch to it when it has completed the current buffer. If this constraint is not met
/// it's possible that old DAC codes will be generated on the output and the output samples will
/// be delayed by 1 batch.
///
/// Because the ADC and DAC operate at the same rate, these two constraints actually implement
/// the same time bounds, meeting one also means the other is also met.
#[task(binds=DMA1_STR4, resources=[adcs, dacs, iir_state, iir_ch, telemetry], priority=2)]
fn process(c: process::Context) {
let adc_samples = [
c.resources.adcs.0.acquire_buffer(),
c.resources.adcs.1.acquire_buffer(),
];
let dac_samples = [
c.resources.dacs.0.acquire_buffer(),
c.resources.dacs.1.acquire_buffer(),
];
for channel in 0..adc_samples.len() {
for sample in 0..adc_samples[0].len() {
let x = f32::from(adc_samples[channel][sample] as i16);
let mut y = x;
for i in 0..c.resources.iir_state[channel].len() {
y = c.resources.iir_ch[channel][i]
.update(&mut c.resources.iir_state[channel][i], y);
}
// Note(unsafe): The filter limits ensure that the value is in range.
// The truncation introduces 1/2 LSB distortion.
let y = unsafe { y.to_int_unchecked::<i16>() };
// Convert to DAC code
dac_samples[channel][sample] = y as u16 ^ 0x8000;
}
}
// Update telemetry measurements.
// TODO: Should we report these as voltages?
c.resources.telemetry.latest_samples =
[adc_samples[0][0] as i16, adc_samples[1][0] as i16];
c.resources.telemetry.latest_outputs =
[dac_samples[0][0] as i16, dac_samples[1][0] as i16];
}
2021-02-17 19:08:03 +08:00
#[idle(resources=[mqtt_interface, clock], spawn=[settings_update])]
fn idle(mut c: idle::Context) -> ! {
2021-02-17 19:08:03 +08:00
let clock = c.resources.clock;
loop {
2021-02-17 19:08:03 +08:00
let sleep = c.resources.mqtt_interface.lock(|interface| {
2021-03-15 18:41:13 +08:00
match interface.network_stack().poll(clock.current_ms()) {
Ok(updated) => !updated,
Err(err) => {
log::info!("Network error: {:?}", err);
2021-03-17 21:47:14 +08:00
false
2021-03-15 18:41:13 +08:00
}
}
2021-02-17 19:08:03 +08:00
});
2021-01-30 22:00:58 +08:00
2021-03-05 00:26:10 +08:00
match c
.resources
2021-01-30 22:00:58 +08:00
.mqtt_interface
2021-03-05 00:26:10 +08:00
.lock(|interface| interface.update())
2021-01-30 22:00:58 +08:00
{
2021-03-05 00:26:10 +08:00
Ok(update) => {
if update {
c.spawn.settings_update().unwrap();
} else if sleep {
//cortex_m::asm::wfi();
2021-03-05 00:26:10 +08:00
}
}
Err(miniconf::MqttError::Network(
smoltcp_nal::NetworkError::NoIpAddress,
)) => {}
Err(error) => log::info!("Unexpected error: {:?}", error),
}
}
}
#[task(priority = 1, resources=[mqtt_interface, afes, settings, iir_ch])]
2021-02-17 19:59:24 +08:00
fn settings_update(mut c: settings_update::Context) {
let settings = &c.resources.mqtt_interface.settings;
// Update the IIR channels.
c.resources.iir_ch.lock(|iir| *iir = settings.iir_ch);
// Update currently-cached settings.
*c.resources.settings = *settings;
2021-02-17 19:59:24 +08:00
// Update AFEs
c.resources.afes.0.set_gain(settings.afe[0]);
c.resources.afes.1.set_gain(settings.afe[1]);
}
#[task(priority = 1, resources=[mqtt_interface, settings, telemetry], schedule=[telemetry])]
fn telemetry(mut c: telemetry::Context) {
let telemetry = c.resources.telemetry.lock(|telemetry| {
// TODO: Incorporate digital input status.
telemetry.digital_inputs = [false, false];
telemetry.clone()
});
// Serialize telemetry outside of a critical section to prevent blocking the processing
// task.
2021-04-15 21:08:57 +08:00
let telemetry = miniconf::serde_json_core::to_string::<
heapless::consts::U256,
_,
>(&telemetry)
.unwrap();
2021-04-15 21:08:57 +08:00
c.resources.mqtt_interface.client(|client| {
// TODO: Incorporate current MQTT prefix instead of hard-coded value.
client.publish("dt/sinara/dual-iir/telemetry", telemetry.as_bytes(), minimq::QoS::AtMostOnce, &[]).ok()
});
// Schedule the telemetry task in the future.
c.schedule
.telemetry(
c.scheduled
+ SystemTimer::ticks_from_secs(
c.resources.settings.telemetry_period_secs as u32,
),
)
.unwrap();
}
#[task(binds = ETH, priority = 1)]
fn eth(_: eth::Context) {
unsafe { hal::ethernet::interrupt_handler() }
}
#[task(binds = SPI2, priority = 3)]
fn spi2(_: spi2::Context) {
panic!("ADC0 input overrun");
}
#[task(binds = SPI3, priority = 3)]
fn spi3(_: spi3::Context) {
2021-03-02 02:49:21 +08:00
panic!("ADC1 input overrun");
}
#[task(binds = SPI4, priority = 3)]
fn spi4(_: spi4::Context) {
panic!("DAC0 output error");
}
#[task(binds = SPI5, priority = 3)]
fn spi5(_: spi5::Context) {
panic!("DAC1 output error");
}
extern "C" {
// hw interrupt handlers for RTIC to use for scheduling tasks
// one per priority
fn DCMI();
fn JPEG();
fn SDMMC();
}
};