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DDR: fixed register write. #44

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sb10q merged 1 commits from pca006132/zynq-rs:master into master 2020-07-06 11:46:38 +08:00
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pca006132 commented 2020-07-06 11:45:25 +08:00

Previously it writes 0x20066, while the ps7_init set it to be
0x200066, notice the 1 more 0.
This should perform the same writes to the registers, so we do not have
to apply the ps7_init in artiq_zynq.

Previously it writes `0x20066`, while the ps7_init set it to be `0x200066`, notice the 1 more 0. This should perform the same writes to the registers, so we do not have to apply the ps7_init in artiq_zynq.
sb10q closed this pull request 2020-07-06 11:46:38 +08:00
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Reference: M-Labs/zynq-rs#44
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