Issues - zynq-rs - M-Labs Git

M-Labs/zynq-rs

New Issue

update rustc

#102 opened 2022-10-07 18:49:30 +08:00 by sb10q

add Kasli-SoC debug instructions in readme

#94 opened 2022-03-10 16:55:56 +08:00 by sb10q

Low memcpy throughput

#75 opened 2021-01-22 14:54:20 +08:00 by pca006132

intermittent missing newline in UART output during PLL init

#49 opened 2020-07-20 19:49:42 +08:00 by sb10q

openocd connection causes FIQ

#27 opened 2020-05-05 20:00:42 +08:00 by sb10q

regs: use ToPrimitive/FromPrimitive

#25 opened 2020-04-28 05:14:54 +08:00 by astro