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839 Commits

Author SHA1 Message Date
David Mak 411837cacd artiq: Specify target CPU when creating LLVM target options 
We can try to optimize for the host and Cortex-A9 chips; The RISC-V
ISAs do not target specific chips, so we will fallback to using the
generic CPU.
 2023-09-18 11:35:20 +08:00
David Mak f59d45805f standalone: Add command line flags for target properties 
For testing codegen for different platforms on the host system.
 2023-09-18 11:35:20 +08:00
David Mak 048fcb0a69 core: Switch to LLVM New Pass Manager 2023-09-18 11:35:15 +08:00
David Mak 676d07657a core: Add target field to CodeGenLLVMOptions 
For specifying the target machine options when optimizing and linking.

This field is currently unused but will be required in a future
commit.
 2023-09-18 09:46:24 +08:00
David Mak 2482a1ef9b core: Add CodeGenTargetMachineOptions 
Needed in a future commit.
 2023-09-18 09:41:49 +08:00
David Mak eb63f2ad48 meta: Update to Rust Edition 2021 2023-09-15 10:25:50 +08:00
Sebastien Bourdeauducq ff27e22ee6 flake: switch back to nixpkgs unstable 
Too many issues with python-updates branch for now.
 2023-09-13 19:15:47 +08:00
Sebastien Bourdeauducq d672ef094b msys2: update packages, Python 3.11 2023-09-13 09:50:33 +08:00
Sebastien Bourdeauducq d25921230e switch to Python 3.11 2023-09-13 09:44:08 +08:00
Sebastien Bourdeauducq 66f07b5bf4 flake: switch to nixos-unstable 2023-09-12 18:14:39 +08:00
David Mak 008d50995c meta: Update run_demo.sh 
- Allow more than one argument to nac3standalone executable
 2023-09-12 16:20:50 +08:00
David Mak 474f9050ce standalone: Expose flags in command-line 2023-09-12 16:20:49 +08:00
David Mak 3993a5cf3f core: Add LLVM options to WorkerRegistry 2023-09-12 10:57:05 +08:00
David Mak 39724de598 core: Add CodeGenLLVMOptions 
For specifying LLVM options during code generation.
 2023-09-12 10:57:04 +08:00
David Mak e4940247f3 standalone: Implement command-line parser using clap 
In preparation for adding more command-line options.
 2023-09-12 10:08:34 +08:00
David Mak 4481d48709 core: Use C-style for loop logic for iterables 
Index increment is now performed at the end of the loop body.
 2023-09-06 20:09:38 +08:00
David Mak b4983526bd core: Remove redundant for.cond BB for iterable loops 
Simplifies logic for creating basic blocks.
 2023-09-06 20:09:37 +08:00
David Mak b4a9616648 core: Add assertion for when `range` has step of 0 
Aligns with the behavior in Python.
 2023-09-06 20:09:36 +08:00
David Mak e0de82993f core: Preserve value of variable shadowed by for loop 
Previously, the final value of the target expression would be one after
the last element of the loop, which does not match Python's behavior.

This commit fixes this problem while also preserving the last assigned
value of the loop beyond the loop, matching Python's behavior.
 2023-09-06 20:09:36 +08:00
David Mak 6805253515 core: Use AST var name for IR name 
Aids debugging IR.
 2023-09-06 20:09:36 +08:00
David Mak 19915bac79 core: Prepend statement type to basic block label names 
Aids debugging IR.
 2023-09-06 20:09:36 +08:00
David Mak 17b4686260 standalone: Adapt loop example to output loop variable 2023-09-06 18:56:45 +08:00
David Mak 6de0884dc1 core: Use anonymous name for variables if unspecified 
The current default prefix is only derived from the instruction type,
which is not helpful during the comprehension of the IR. Changing to
anonymous names (e.g. %1) helps understand that the variable is only
needed as part of a larger (possibly named) expression.
 2023-09-06 14:02:15 +08:00
David Mak f1b0e05b3d core: Rename IR variables 
Because it is unclear which variables are expressions and
subexpressions, all variables which are previously anonymous are named
using (1) the control flow statement if available, (2) the possible name
of the variable as inferred from the variable name in Rust, and (3) the
"addr" prefix to indicate that the values are pointers. These three
strings are joint together using '.', forming "for.i.addr" for instance.
 2023-09-06 14:02:15 +08:00
David Mak ff23968544 core: Add name parameter to gen_{var_alloc,store_target} 
This allows variables in the IR to be assigned a custom name as opposed
to names with a default prefix.
 2023-09-06 11:00:02 +08:00
Sebastien Bourdeauducq 049908044a flake: update dependencies 2023-09-04 11:00:15 +08:00
David Mak d37287a33d Cargo: Update dependencies 2023-09-04 10:43:57 +08:00
Sebastien Bourdeauducq 283bd7c69a cargo: update dependencies 2023-07-14 10:57:21 +08:00
Sebastien Bourdeauducq 3d73f5c129 flake: update dependencies 2023-07-10 13:46:00 +08:00
Sebastien Bourdeauducq d824c5d8b5 flake: cleanup dev shells 2023-05-30 16:28:46 +08:00
Sebastien Bourdeauducq b8d637f5c4 cargo: update dependencies 2023-05-27 18:56:21 +08:00
Sebastien Bourdeauducq 3af287d1c4 flake: nixpkgs 23.05 2023-05-27 18:14:55 +08:00
Sebastien Bourdeauducq 5b53be0311 update dependencies 2023-04-30 17:11:47 +08:00
Sebastien Bourdeauducq aead36f0fd update dependencies 2023-03-08 15:19:09 +08:00
Sebastien Bourdeauducq c269444c0b msys2: update packages 2023-01-14 16:09:21 +08:00
Sebastien Bourdeauducq 52cec3c12f msys2: nix store doesn't like tildes 2023-01-14 16:09:00 +08:00
Sebastien Bourdeauducq 2927f2a1d0 msys2: adapt to recent pacman 2023-01-14 16:08:39 +08:00
Sebastien Bourdeauducq c1c45373a6 update dependencies 2023-01-12 19:31:03 +08:00
Sebastien Bourdeauducq 946ea155b8 flake: switch to NixOS release 2022-11-30 11:37:48 +08:00
Sebastien Bourdeauducq 085c6ee738 update dependencies 2022-11-18 16:15:46 +08:00
Sebastien Bourdeauducq cfa67c418a update MSYS2 URL 2022-11-03 19:00:44 +08:00
Sebastien Bourdeauducq 813bfa92a7 windows: fix nac3artiq module installation path 2022-08-05 22:42:32 +08:00
Sebastien Bourdeauducq fff4b65169 windows: parallel LLVM build 2022-08-05 18:24:00 +08:00
Sebastien Bourdeauducq c891fffd75 windows: update msys2, python 3.10 2022-08-05 17:27:07 +08:00
Sebastien Bourdeauducq 12acd35e15 switch to nixpkgs master, python 3.10 2022-08-05 17:24:49 +08:00
Sebastien Bourdeauducq f66ca02b2d update Rust dependencies 2022-08-05 16:58:57 +08:00
z78078 b514f91441 nac3artiq: inherit kernel constructors 
Closes #139
Co-authored-by: z78078 <cc@m-labs.hk>
Co-committed-by: z78078 <cc@m-labs.hk>
 2022-07-28 19:18:36 +08:00
z78078 8f95b79257 nac3artiq: throw error message when constructor use rpc decorator (#306) 
Co-authored-by: z78078 <cc@m-labs.hk>
Co-committed-by: z78078 <cc@m-labs.hk>
 2022-07-11 15:55:55 +08:00
z78078 ebd25af38b nac3standalone: allow classes without explicit init (#221) 
Reviewed-on: #304
Co-authored-by: z78078 <cc@m-labs.hk>
Co-committed-by: z78078 <cc@m-labs.hk>
 2022-07-07 10:36:25 +08:00
z78078 96b3a3bf5c work around random segmentation fault (#275) 
Reviewed-on: #302
Co-authored-by: z78078 <cc@m-labs.hk>
Co-committed-by: z78078 <cc@m-labs.hk>
 2022-07-04 18:06:36 +08:00