 occheung
|
7729362d52
|
dds: add ram control
|
2021-01-29 16:47:28 +08:00 |
|
occheung
|
49c5fec30f
|
Bug fixes:
+ Manage I/O Update pulse width.
- Remove retry-till-success PLL setup.
* Filter away unused bit in ASF when reading from DDS
* Reduce log from SPI
|
2021-01-27 15:56:46 +08:00 |
|
occheung
|
f1069d951d
|
urukul: failsave for PLL timeout
|
2020-12-18 17:43:59 +08:00 |
|
occheung
|
f8ccb66077
|
dds: fix return type
|
2020-09-30 16:42:54 +08:00 |
|
occheung
|
b577c8b715
|
dds: strictly enforce ~lsb_first and sdio_input_only
|
2020-09-30 15:57:06 +08:00 |
|
occheung
|
21999b6cbf
|
mqtt_mux: add feedback for singletone/clock
|
2020-09-29 17:02:43 +08:00 |
|
occheung
|
3abc0c3e4e
|
dds: improve comment
|
2020-09-29 14:21:26 +08:00 |
|
occheung
|
90446bcce2
|
dds: fix tab
|
2020-09-28 14:13:32 +08:00 |
|
occheung
|
0a3518573a
|
dds: add frequency sweep
|
2020-09-25 17:07:52 +08:00 |
|
occheung
|
dff726d121
|
fix tab/space
|
2020-09-25 14:24:33 +08:00 |
|
occheung
|
e17cc27cbb
|
main: functioning
|
2020-09-24 17:32:53 +08:00 |
|
occheung
|
26c987bd04
|
dds: add get/set for sys_clk
|
2020-09-24 17:14:27 +08:00 |
|
occheung
|
3211261488
|
dds: add ram control
|
2020-09-23 17:29:20 +08:00 |
|
occheung
|
883e821794
|
dds: closure param for ram set
|
2020-09-18 14:08:51 +08:00 |
|
occheung
|
25f8363e54
|
dds: add RAM mode
|
2020-09-18 12:25:39 +08:00 |
|
occheung
|
412e6c0ea9
|
dds: allow single tone iterative setup
|
2020-09-16 14:23:01 +08:00 |
|
occheung
|
e1abf87351
|
dds: more clk ctrl; scpi: sys_clk ctrl
|
2020-09-16 12:05:45 +08:00 |
|
occheung
|
b502b42c92
|
scpi: fix frequency control
|
2020-09-15 14:03:59 +08:00 |
|
occheung
|
82867178f9
|
fix: reduce warning
|
2020-09-14 17:33:50 +08:00 |
|
occheung
|
ecdb114679
|
src: replace hprint with logging
|
2020-09-10 14:35:47 +08:00 |
|
occheung
|
1e7fd93835
|
scpi: fix dds test sdio_in_only
|
2020-09-01 10:21:55 +08:00 |
|
occheung
|
8dbf621679
|
scpi: implement tst
|
2020-08-31 17:43:15 +08:00 |
|
occheung
|
f60ec09b29
|
scpi: implement rst
|
2020-08-31 16:48:21 +08:00 |
|
occheung
|
fbed41ebd3
|
dds: exclude RAM from impl_reg_io macro
|
2020-08-27 12:17:53 +08:00 |
|
occheung
|
1de13d6f3a
|
dds: fix full amplitude scale
|
2020-08-27 11:15:42 +08:00 |
|
occheung
|
649b5b498b
|
dds: add single tone control
|
2020-08-26 17:39:33 +08:00 |
|
occheung
|
1d3ced0d16
|
dds: add clock control
|
2020-08-26 16:49:37 +08:00 |
|
occheung
|
38b1c7528c
|
dds: add register io
|
2020-08-26 13:18:50 +08:00 |
|
occheung
|
5f874e81b5
|
bitmask: add mask merging
|
2020-08-26 11:04:08 +08:00 |
|
occheung
|
8547610661
|
dds: add register io
|
2020-08-17 12:15:11 +08:00 |
|
occheung
|
afe00402b7
|
dds: add register macro
|
2020-08-17 11:45:42 +08:00 |
|
occheung
|
f32de647d3
|
dds: add all cfg enum
|
2020-08-14 14:14:14 +08:00 |
|
occheung
|
bb1feb65f7
|
dds: add cfg1 enum
|
2020-08-13 17:17:21 +08:00 |
|
occheung
|
fe47cafb93
|
dds: init
|
2020-08-12 15:31:06 +08:00 |