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fix: reduce warning

pull/4/head
occheung 2020-09-14 17:33:50 +08:00
parent f94528ae2a
commit 82867178f9
8 changed files with 67 additions and 82 deletions
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44
examples/ethernet.rs
View File

@ -7,7 +7,6 @@ use core::sync::atomic::{AtomicU32, Ordering};
extern crate log;
use cortex_m;
use cortex_m::asm::nop;
use cortex_m_rt::{
entry,
exception,
@ -15,14 +14,9 @@ use cortex_m_rt::{
extern crate smoltcp;
use stm32h7xx_hal::ethernet;
use stm32h7xx_hal::gpio::Speed;
use stm32h7xx_hal::hal::digital::v2::{
OutputPin,
InputPin,
};
use stm32h7xx_hal::hal::digital::v2::InputPin;
use stm32h7xx_hal::rcc::CoreClocks;
use stm32h7xx_hal::{pac, prelude::*, spi, stm32, stm32::interrupt};
use Speed::*;
use core::{
str,
@ -32,8 +26,8 @@ use core::mem::uninitialized;
// Exception: no phy::wait
//use smoltcp::phy::wait as phy_wait;
use smoltcp::wire::{EthernetAddress, IpAddress, IpCidr, Ipv4Address};
use smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder, Routes};
use smoltcp::wire::{IpAddress, IpCidr};
use smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder};
use smoltcp::socket::SocketSet;
use smoltcp::socket::{SocketHandle, TcpSocket, TcpSocketBuffer};
use smoltcp::time::{Duration, Instant};
@ -44,16 +38,6 @@ use embedded_nal::TcpStack;
use firmware;
use firmware::{
attenuator::Attenuator,
config_register::{
ConfigRegister,
CFGMask,
StatusMask,
},
dds::{
DDS,
DDSCFRMask,
},
cpld::{
CPLD,
},
@ -63,6 +47,10 @@ use firmware::{
Channel1SwitchCommand,
Channel2SwitchCommand,
Channel3SwitchCommand,
Channel0AttenuationCommand,
Channel1AttenuationCommand,
Channel2AttenuationCommand,
Channel3AttenuationCommand,
ClockSourceCommand,
ClockDivisionCommand,
},
@ -83,9 +71,6 @@ use scpi::{
ieee488_stb,
ieee488_tst,
ieee488_wai,
nquery,
//Helpers
qonly,
scpi_crate_version,
scpi_status,
scpi_system,
@ -290,16 +275,20 @@ fn main() -> ! {
}
},
"CHANNEL0" => {
"SWitch" => Channel0SwitchCommand
"SWitch" => Channel0SwitchCommand,
"Attenuation" => Channel0AttenuationCommand
},
"CHANNEL1" => {
"SWitch" => Channel1SwitchCommand
"SWitch" => Channel1SwitchCommand,
"Attenuation" => Channel1AttenuationCommand
},
"CHANNEL2" => {
"SWitch" => Channel2SwitchCommand
"SWitch" => Channel2SwitchCommand,
"Attenuation" => Channel2AttenuationCommand
},
"CHANNEL3" => {
"SWitch" => Channel3SwitchCommand
"SWitch" => Channel3SwitchCommand,
"Attenuation" => Channel3AttenuationCommand
},
"CLOCK" => {
"SOURCE" => ClockSourceCommand,
@ -364,7 +353,7 @@ fn main() -> ! {
}
if socket.can_recv() {
let mut data = socket.recv(|buffer| {
let data = socket.recv(|buffer| {
(buffer.len(), buffer)
}).unwrap();
if str::from_utf8(data).unwrap().trim() == "quit" {
@ -394,6 +383,7 @@ use stm32h7xx_hal::gpio::{
/*
* Migrated ethernet setup pins
*/
#[allow(non_camel_case_types)]
pub fn setup_ethernet_pins<REF_CLK, MDIO, MDC, CRS_DV, RXD0, RXD1, TX_EN, TXD0, TXD1>(
pa1: PA1<REF_CLK>, pa2: PA2<MDIO>, pc1: PC1<MDC>, pa7: PA7<CRS_DV>, pc4: PC4<RXD0>,
pc5: PC5<RXD1>, pg11: PG11<TX_EN>, pg13: PG13<TXD0>, pb13: PB13<TXD1>

12
src/attenuator.rs
View File

@ -40,20 +40,16 @@ where
}
let mut clone = self.data.clone();
// Transmit SPI once to set attenuation
match self.spi.transfer(&mut clone).map_err(Error::SPI) {
Err(e) => Err(Error::AttenuatorError),
Ok(_) => Ok(()),
}
self.spi.transfer(&mut clone)
.map(|_| ())
.map_err(|_| Error::AttenuatorError)
}
pub fn set_channel_attenuation(&mut self, channel: u8, attenuation: f32) -> Result<(), Error<E>> {
assert!(channel < 4);
let mut arr: [f32; 4] = self.get_attenuation()?;
arr[channel as usize] = attenuation;
match self.set_attenuation(arr) {
Ok(v) => Ok(()),
Err(e) => Err(e)
}
self.set_attenuation(arr).map(|_| ())
}
pub fn get_channel_attenuation(&mut self, channel: u8) -> Result<f32, Error<E>> {

1
src/bitmask_macro.rs
View File

@ -9,6 +9,7 @@
macro_rules! construct_bitmask {
($collection: ident; $unsigned_type: ty; $($name: ident, $shift: expr, $width: expr),+) => {
#[derive(Debug, Copy, Clone, PartialEq, Eq)]
#[allow(non_camel_case_types)]
pub enum $collection {
$(
$name,

8
src/dds.rs
View File

@ -213,6 +213,7 @@ where
}
}
#[allow(non_snake_case)]
fn get_VCO_no(&mut self, f_sys_clk: u64, divider: u8) -> Result<u8, Error<E>> {
// Select a VCO
if divider == 1 {
@ -387,10 +388,9 @@ macro_rules! impl_register_io {
for i in 0..$reg_byte_size {
arr[i+1] = bytes[i];
}
match self.spi.transfer(&mut arr).map_err(Error::SPI) {
Ok(v) => Ok(()),
Err(e) => Err(e),
}
self.spi.transfer(&mut arr)
.map(|_| ())
.map_err(Error::SPI)
},
)*
_ => panic!("Bad address for DDS writing.")

35
src/lib.rs
View File

@ -153,6 +153,7 @@ pub trait UrukulTraits {
fn set_channel_switch(&mut self, channel: u32, status: bool) -> Result<(), Self::Error>;
fn set_clock_source(&mut self, source: ClockSource) -> Result<(), Self::Error>;
fn set_clock_division(&mut self, division: u8) -> Result<(), Self::Error>;
fn set_channel_attenuation(&mut self, channel: u8, attenuation: f32) -> Result<(), Self::Error>;
}
impl<SPI, E> UrukulTraits for Urukul<SPI>
@ -163,10 +164,7 @@ where
fn get_channel_switch_status(&mut self, channel: u32) -> Result<bool, Self::Error> {
if channel < 4 {
match self.config_register.get_status(StatusMask::RF_SW) {
Ok(val) => Ok((val & (1 << channel)) != 0),
Err(_e) => Err(_e),
}
self.config_register.get_status(StatusMask::RF_SW).map(|val| (val & (1 << channel)) != 0)
} else {
Err(Error::ParameterError)
}
@ -182,19 +180,16 @@ where
prev & (!(1 << channel))
}
};
match self.config_register.set_configurations(&mut [
self.config_register.set_configurations(&mut [
(CFGMask::RF_SW, next),
]) {
Ok(_) => Ok(()),
Err(_e) => Err(_e),
}
]).map(|_| ())
} else {
Err(Error::ParameterError)
}
}
fn set_clock_source(&mut self, source: ClockSource) -> Result<(), Self::Error> {
let result = match source {
match source {
ClockSource::OSC => self.config_register.set_configurations(&mut [
(CFGMask::CLK_SEL0, 0),
(CFGMask::CLK_SEL1, 0),
@ -206,15 +201,11 @@ where
ClockSource::SMA => self.config_register.set_configurations(&mut [
(CFGMask::CLK_SEL0, 1),
]),
};
match result {
Ok(_) => Ok(()),
Err(_e) => Err(_e),
}
}.map(|_| ())
}
fn set_clock_division(&mut self, division: u8) -> Result<(), Self::Error> {
let result = match division {
match division {
1 => self.config_register.set_configurations(&mut [
(CFGMask::DIV, 1),
]),
@ -225,10 +216,10 @@ where
(CFGMask::DIV, 3),
]),
_ => Err(Error::ParameterError),
};
match result {
Ok(_) => Ok(()),
Err(_e) => Err(_e),
}
}.map(|_| ())
}
}
fn set_channel_attenuation(&mut self, channel: u8, attenuation: f32) -> Result<(), Self::Error> {
self.attenuator.set_channel_attenuation(channel, attenuation)
}
}

30
src/main.rs
View File

@ -1,7 +1,10 @@
#![no_main]
#![no_std]
use panic_semihosting as _;
#[macro_use]
extern crate log;
use log::{trace, debug, info, warn};
use stm32h7xx_hal::hal::digital::v2::{
InputPin,
@ -11,7 +14,6 @@ use stm32h7xx_hal::{pac, prelude::*, spi};
use cortex_m;
use cortex_m_rt::entry;
use cortex_m_semihosting::hprintln;
use firmware;
use firmware::{
@ -30,10 +32,13 @@ use firmware::{
}
};
#[path = "../examples/util/logger.rs"]
mod logger;
#[entry]
fn main() -> ! {
let cp = cortex_m::Peripherals::take().unwrap();
let mut cp = cortex_m::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
let pwr = dp.PWR.constrain();
@ -41,9 +46,16 @@ fn main() -> ! {
let rcc = dp.RCC.constrain();
let ccdr = rcc
.use_hse(8.mhz())
.sys_ck(400.mhz())
.pll1_q_ck(48.mhz())
.pll1_r_ck(400.mhz())
.freeze(vos, &dp.SYSCFG);
unsafe {
logger::enable_itm(&dp.DBGMCU, &mut cp.DCB, &mut cp.ITM);
}
logger::init();
let mut delay = cp.SYST.delay(ccdr.clocks);
@ -58,10 +70,10 @@ fn main() -> ! {
let fpga_cdone = gpiod.pd15.into_pull_up_input();
match fpga_cdone.is_high() {
Ok(true) => hprintln!("FPGA is ready."),
Ok(_) => hprintln!("FPGA is in reset state."),
Err(_) => hprintln!("Error: Cannot read C_DONE"),
}.unwrap();
Ok(true) => info!("FPGA is ready."),
Ok(_) => info!("FPGA is in reset state."),
Err(_) => info!("Error: Cannot read C_DONE"),
};
/*
* Using SPI1, AF5
@ -150,10 +162,10 @@ fn main() -> ! {
0x04, // Recirculate mode
]).unwrap();
hprintln!("{:#X?}", dds0.read_register(0x0E, &mut[
debug!("{:#X?}", dds0.read_register(0x0E, &mut[
0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00,
]).unwrap()).unwrap();
]).unwrap());
// Choose profile 0
config.set_configurations(&mut [

9
src/nal_tcp_client.rs
View File

@ -60,15 +60,10 @@ impl<'a, 'b, 'c, 'n> NetworkStack<'a, 'b, 'c, 'n> {
}
pub fn update(&mut self, time: u32) -> bool {
match self.network_interface.poll(
self.network_interface.poll(
&mut self.sockets.borrow_mut(),
net::time::Instant::from_millis(time as i64),
) {
Ok(changed) => changed == false,
Err(e) => {
true
}
}
).map_or(true, |changed| changed == false)
}
fn get_ephemeral_port(&self) -> u16 {

10
src/spi_slave.rs
View File

@ -51,13 +51,13 @@ where
fn transfer<'w>(&mut self, words: &'w mut[u8]) -> Result<&'w [u8], Self::Error> {
self.0.do_on_get_ref_mut_data(move |mut dev| {
dev.select_chip(self.1);
let result = dev.spi.transfer(words).map_err(Error::SPI);
dev.select_chip(0);
dev.select_chip(self.1).map_err(|_| Error::CSError)?;
let result = dev.spi.transfer(words).map_err(Error::SPI)?;
dev.select_chip(0).map_err(|_| Error::CSError)?;
if self.2 {
dev.issue_io_update();
dev.issue_io_update().map_err(|_| Error::IOUpdateError)?;
}
result
Ok(result)
})
}
}