artiq/artiq/gateware
Sebastien Bourdeauducq 3027951dd8 integrate new AD9914 driver
moninj, analyzer, docs, examples, tests.
2018-05-13 23:29:35 +08:00
..
amp refactor targets 2018-01-22 18:25:10 +08:00
drtio siphaser: support external reference for the freerunning 150MHz 2018-05-12 22:57:11 +08:00
dsp dsp/fir: outputs reset_less (pipelined) 2018-03-13 17:11:50 +00:00
rtio integrate new AD9914 driver 2018-05-13 23:29:35 +08:00
serwb serwb/core: reduce buffering, use buffered=True 2018-05-12 12:03:58 +02:00
suservo suservo: add clip flags (#992) 2018-05-09 07:16:15 +00:00
targets gateware: fix Sayma satellite build. 2018-05-13 13:10:39 +00:00
test serwb: remove unnecessary shebang line 2018-05-12 22:49:44 +08:00
__init__.py artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
ad9_dds.py ad9xxx -> ad9_dds 2017-01-04 11:34:52 +01:00
nist_clock.py gateware/nist_clock: increase DDS bus drive strength. Closes #468 2016-06-07 11:08:19 -04:00
nist_qc2.py qc2: swap SPI/TTL, all TTL lines are now In+Out compatible 2016-05-19 10:42:03 +08:00
remote_csr.py remote_csr: add sanity check of CSR CSV type column 2018-02-13 20:02:51 +08:00