M-Labs
/
artiq
mirror of https://github.com/m-labs/artiq.git
2
0
Fork 2
Code Issues Projects Releases Wiki Activity
5,628 Commits 13 Branches 35 Tags 26 MiB
Commit Graph

5628 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq e83863a8da conda: bump migen 2018-03-29 12:35:41 +08:00
Sebastien Bourdeauducq 493d2a653f siphaser: add false path between sys_clk and mmcm_freerun_output 2018-03-29 10:55:41 +08:00
Sebastien Bourdeauducq 4229c045f4 kasli: fix DRTIO master clock constraint 2018-03-29 10:20:31 +08:00
Sebastien Bourdeauducq 3d89ba2e11 sayma: remove debug leftover 2018-03-29 10:20:17 +08:00
Sebastien Bourdeauducq 605292535c kasli: ignore OSERDESE2->ISERDESE2 timing path on DRTIO targets as well 2018-03-29 10:12:02 +08:00
Sebastien Bourdeauducq 416232cb64 runtime: do not reset RTIO PHY on core.reset(). Closes #971 2018-03-28 10:51:07 +08:00
Sebastien Bourdeauducq 5ca59467fd ad53xx: make LDAC and CLR optional 2018-03-26 22:45:01 +08:00
whitequark bab6723ff2 Revert "gateware: don't run tests if there is no migen." 
This reverts commit 4804cfef9b.
 2018-03-26 03:33:52 +00:00
whitequark 4804cfef9b gateware: don't run tests if there is no migen. 
This allows us to skip testing gateware on Windows.
 2018-03-26 03:26:34 +00:00
whitequark 87c2f119a5 artiq_devtool: add load action. 2018-03-25 20:29:51 +00:00
Sebastien Bourdeauducq 8d62ea2288 examples: fix KC705 ad53xx 2018-03-25 11:19:54 +08:00
Sebastien Bourdeauducq c3f763e217 dashboard: also create monitoring widgets for the Zotino class 2018-03-25 11:19:40 +08:00
Sebastien Bourdeauducq d6a63ad165 RELEASE_NOTES: formatting 2018-03-25 11:19:25 +08:00
Robert Jördens a20dfd9c00 examples/master: ad5360 -> zotino 2018-03-24 16:46:59 +01:00
Robert Jördens 774030698e doc: title underline 2018-03-24 16:07:53 +01:00
Robert Jördens 0505e9124f kc705: port device_db, ad53xx/zotino example 2018-03-24 16:05:26 +01:00
Robert Jördens 3a0dfb7fdc ad53xx: port monitor, moninj dashboard, kc705 target 2018-03-24 16:04:02 +01:00
Robert Jördens a8f0ee1c86 ad53xx: refactor offset_to_mu(), fix docs 2018-03-24 15:45:42 +01:00
Robert Jördens b0c8097025 ad53xx: remove channel index AND 
It's incorrect since it doesn't respect the number of channels
of any of those chips (none has 64 channels).
 2018-03-24 15:39:06 +01:00
Robert Jördens 77bcc2c78f zotino: style, use attributes to set SPI config 2018-03-24 15:37:34 +01:00
Robert Jördens 22557294ac RELEASE_NOTES: ad53xx, zotino 2018-03-24 15:20:04 +01:00
Robert Jördens 9bc2ce84fc doc: ad5360 -> ad53xx, add zotino 2018-03-24 15:18:08 +01:00
Robert Jördens 2cf414a480 ad53xx: move 8 bit shift out of ad53xx protocol funcs 
That's specific to the SPI bus, not to the ad53xx.
 2018-03-24 15:15:56 +01:00
Robert Jördens 08326c5727 ad53xx: style [nfc] 2018-03-24 14:10:20 +01:00
Robert Jördens 68e433a3a8 opticlock/device_db: resurrect novogorny 
deleted in a992a67
 2018-03-24 13:46:45 +01:00
hartytp a992a672d9 coredevice/zotino: add (#969) 
* Replace ad5360 driver with a ad53xx driver, designed to have a nicer interface
Add Zotino driver and add to opticlock target for Kasli
Test Zotino on hw:
 - Verify all timings on the hardware with a scope
 - Verify that we can correctly set and read back all registers in a loop (checks for SI and driver issues)
 - check we can set LEDs correctly
 - check calibration routine + all si unit functions with a good DVM
 - look at DAC transitions on a scope (while triggering of a TTL) on persist to check there are no LDAC glitches etc
To do: update examples and e.g. KC705 device db.
 2018-03-24 13:41:18 +01:00
Robert Jördens 1553fc8c7d sed: reset `valid` in output sorter 2018-03-23 11:11:11 +00:00
Sebastien Bourdeauducq 0635907699 artiq_flash: fix cmdline formatting 2018-03-22 19:10:29 +08:00
Sebastien Bourdeauducq 46d5af31a1 artiq_flash: enclose filename in curly braces before passing to OpenOCD 
Closes #927
 2018-03-22 17:20:48 +08:00
Sebastien Bourdeauducq eeedcfbdd7 artiq_flash: do not suppress useful backtrace information 2018-03-22 17:11:21 +08:00
Sebastien Bourdeauducq f2cc2a5ff2 firmware: reset local RTIO PHYs on startup (#958) 2018-03-22 16:29:31 +08:00
Sebastien Bourdeauducq 40e2ced85e manual: fix core_drivers_reference 2018-03-22 13:26:45 +08:00
Sebastien Bourdeauducq 9eb0218389 RELEASE_NOTES: add sections for major releases 2018-03-22 13:26:28 +08:00
Sebastien Bourdeauducq 102e3983b5 manual: reorganize core drivers 2018-03-22 12:06:01 +08:00
Sebastien Bourdeauducq 1b91339865 manual: fix text role 2018-03-22 12:05:47 +08:00
Sebastien Bourdeauducq 06f24c6aa2 RELEASE_NOTES: update 2018-03-22 11:46:41 +08:00
Robert Jördens 770b0a7b79 novogorny: conv -> cnv 
* parity with sampler
* also add novogorny device to opticlock
 2018-03-21 18:38:42 +00:00
Robert Jördens 82c4f0eed4 sampler: fix channel gain retrieval 2018-03-21 14:22:13 +01:00
Robert Jördens 12d699f2a8 suservo: add sampler example 2018-03-21 12:21:53 +00:00
Robert Jördens 97918447a3 sampler: add coredevice driver 2018-03-21 12:21:53 +00:00
Robert Jördens 1afce8c613 kasli: simplify single eem pin formatting 2018-03-21 13:08:42 +01:00
Robert Jördens d48b8f3086 kasli: fix sampler sdr/cnv pins 2018-03-21 09:28:00 +00:00
Robert Jördens 80903cead7 novogorny: streamline gain setting method, style [nfc] 2018-03-21 08:53:26 +00:00
Robert Jördens f5a1001114 suservo: add device database and artiq_flash variant 2018-03-21 08:53:26 +00:00
Robert Jördens 1fb5907362 kasli: add SUServo variant (Sampler-Urukul Servo) 2018-03-21 08:53:26 +00:00
Robert Jördens f74d5772f4 sampler: add wide eem definition 2018-03-21 08:53:26 +00:00
Sebastien Bourdeauducq 32f22f4c9c sayma: disable SERDES TTL entirely 
Timing closure becomes very random, even at 4X.
 2018-03-21 13:03:48 +08:00
Sebastien Bourdeauducq f8c2d54e75 ttl_serdes_ultrascale: configurable SERDES ratio. Also try X4 on Sayma 2018-03-21 13:01:38 +08:00
Sebastien Bourdeauducq 9c2d343052 sayma: use SERDES RTIO TTL 
This is not enabled on the standalone design as it breaks timing.
 2018-03-21 10:53:52 +08:00
Robert Jördens 9ad1fd8f25 urukul: add comment and doc about the AD9910 MASTER_RESET 2018-03-20 17:40:03 +01:00