Commit Graph

546 Commits

Author SHA1 Message Date
1bddad6ff2 kasli_soc: fixes to make satellite variant work 2021-09-07 14:51:46 +02:00
cd3e46fb3a fixes in makefile for kasli and satellite variants 2021-09-06 15:23:53 +02:00
76929d2aa1 zc706:
* broke down platforms (refactor),
* added nist master/sat variants
* master doesn't build yet, satellite only simple variant
2021-09-06 14:30:09 +02:00
20681a13c4 gateware: fixed cfg keys - case consistent w/ code 2021-09-06 10:57:42 +02:00
5e916f588e libboard_zynq: * pca9548 selection for si5234
* added proper support for targets
satman:
* removed unnecessary messages
* added libboard_zynq to targets in cargo.toml
2021-09-06 10:44:25 +02:00
9022064cf1 added siphaser to zc706 satellite, small fixes 2021-09-06 09:06:16 +02:00
b678408105 rustc_cfg is case sensitive. Si5324 was not achnowledged. 2021-09-03 14:58:17 +02:00
0c259d9833 kasli_soc: satellite brought to the same level as zc706 2021-09-03 11:05:41 +02:00
3840ebaf74 better solution for fw type based on variant 2021-09-02 15:02:15 +02:00
e38c4a14ca code cleanup:
* moved shared init_gateware to libboard_artiq
* suppressed warnings for zc706 satman
2021-09-02 14:39:34 +02:00
d19a30a2d9 satman: init gateware, set log level 2021-09-02 12:50:42 +02:00
7d719d07e9 default.nix: added symlink for satman fw 2021-09-02 12:50:20 +02:00
cdb58af5b3 remote_run: support loading other firmware types 2021-09-02 12:49:35 +02:00
67f4ec5782 satman: satisfied libunwind's demands, compiles 2021-09-01 15:05:08 +02:00
1ad0e77cae satman: added unwind as it seems necessary 2021-09-01 11:42:41 +02:00
5cfcee6d20 satman: not a library - made closer to runtime 2021-09-01 11:05:46 +02:00
37e8b576b1 satellite:
* fixing repeaters that can't exist on zc706
* fixing various warnings
* fixed timer and i2c references
2021-08-31 15:25:56 +02:00
36bf30c446 satman: removed irrelevant (kasli v2) code 2021-08-31 13:47:43 +02:00
e56f99b3ae satman: straightened up drtio interface 2021-08-31 12:46:52 +02:00
f80f2ac99d added support for satellite variants in nix-build 2021-08-31 11:55:34 +02:00
db9b744825 satman: fixed timeout millisecond/u64 mismatch 2021-08-30 15:06:46 +02:00
be0baf5da8 satman: adjusted drtio::Error instances 2021-08-30 14:38:00 +02:00
59cf4bc689 libboard_zynq: fully modified to work with core_io 2021-08-27 15:16:13 +02:00
581f6c6b4e libboard_artiq: tried moving drtio to io::proto 2021-08-27 14:44:54 +02:00
e0516eeda9 libio: removed custom read/write, moved to core_io 2021-08-27 13:12:19 +02:00
9b2b1dadaa satman: repeater fixes, missing code 2021-08-26 15:20:33 +02:00
cb3f0a404c libio: read/write traits from libio not core_io 2021-08-26 14:59:04 +02:00
10cbea72a2 clean up in dependencies 2021-08-26 13:16:51 +02:00
ff7ba56d26 forgot to remove a debug print 2021-08-26 12:54:19 +02:00
39d522e1a7 drtioaux_proto: removed failure, need to fix traits 2021-08-25 13:03:54 +02:00
a8a2da575b libboard_artiq: added mem.rs, yet to fix drtioaux 2021-08-24 14:11:30 +02:00
37eb4669fb makefile: satman support, separated from runtime 2021-08-24 13:57:10 +02:00
b585eaaa37 zc706: added memory iface generator 2021-08-24 13:51:38 +02:00
1358c8bfe9 zc706 gateware: base class for drtio is SoCCore 2021-08-24 12:01:04 +02:00
b2d9003d9f drtioaucontroller: made two decoders 2021-08-20 15:13:56 +02:00
e43684a3ed moved AXI SRAM to migen-axi 2021-08-18 12:36:17 +02:00
7b868e1c9d few fixes, typos and missed unnecessary statements 2021-08-17 13:16:02 +02:00
61f81cec47 sram: redesigned write FSM. removed unused signals 2021-08-17 11:10:08 +02:00
3e1d14ff38 replaced increment logic with ready Incr module 2021-08-16 15:33:50 +02:00
67ed7fae78 sram: or operator in wrong place for wrapped burst 2021-08-16 12:05:23 +02:00
f015d6732b sram: support for different burst settings on read 2021-08-16 11:51:50 +02:00
b6dd5bea68 sram: fixed wrong assumptions on some signals 2021-08-13 14:58:18 +02:00
bfe0c34f57 sram: rewrote read fsm for sram 2021-08-13 14:14:43 +02:00
39509f01d6 aux_controller: sram ported to axi, first attempt 2021-08-13 13:06:10 +02:00
066987bf07 aux_controller: started porting from wb to axi 2021-08-11 14:34:44 +02:00
7ff59f57a9 gateware: updated gtx interface 2021-08-10 15:11:21 +02:00
118893c0b2 disabled adding axi slave/mem
drtioauxcontroller uses AXI rather than Wishbone
still won't compile - unresolved clock domain error
2021-08-06 15:25:59 +02:00
ae86bbb76e zc706 gateware fixes:
replaced crg cd_sys.clk with ps7.cd_sys.clk
restored gpio
removed mentions of i2c
user_sma_clock consumed by _RTIOCRG already
2021-08-06 13:31:16 +02:00
d68cf7dd49 gateware: replaced wb slave w/ axi (diff soccore) 2021-08-06 11:05:49 +02:00
f9860a61b7 sys_clk_freq is actually 125mhz 2021-08-06 10:39:37 +02:00