artiq/artiq/gateware
2015-06-28 21:37:27 +02:00
..
amp gateware/soc: use Minicon SDRAM controller and 128KB shared L2 cache 2015-06-18 12:18:03 +02:00
rtio soc: support QC2 and AD9914 (untested) 2015-06-28 21:37:27 +02:00
__init__.py artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
ad9xxx.py soc: support QC2 and AD9914 (untested) 2015-06-28 21:37:27 +02:00
nist_qc1.py targets: use _Peripherals/UP/AMP class names, share QC1 IO defs 2015-04-07 00:07:53 +08:00
nist_qc2.py soc: support QC2 and AD9914 (untested) 2015-06-28 21:37:27 +02:00
soc.py gateware/soc: use Minicon SDRAM controller and 128KB shared L2 cache 2015-06-18 12:18:03 +02:00