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artiq/artiq/gateware
Robert Jördens 8813aee6b1 targets: add kasli [wip, untested] 2018-01-04 16:12:12 +01:00
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amp firmware: implement the new bootloader. 2017-12-28 13:18:51 +00:00
drtio drtio: fix GTH CPLL reset 2017-12-30 12:14:36 +08:00
dsp Revert "sawg: advance dds 1/2 by one sample group" 2017-07-04 17:55:19 +02:00
rtio ttl_serdes_7series: refactor IOSERDES 2018-01-02 13:20:47 +01:00
serwb gateware/serwb: add scrambling, reduce cdc fifo depth 2018-01-03 17:34:03 +01:00
targets targets: add kasli [wip, untested] 2018-01-04 16:12:12 +01:00
test gateware/serwb: add test for phy initialization 2017-08-30 17:59:10 +02:00
__init__.py artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
ad9_dds.py ad9xxx -> ad9_dds 2017-01-04 11:34:52 +01:00
nist_clock.py gateware/nist_clock: increase DDS bus drive strength. Closes #468 2016-06-07 11:08:19 -04:00
nist_qc2.py qc2: swap SPI/TTL, all TTL lines are now In+Out compatible 2016-05-19 10:42:03 +08:00
remote_csr.py remote_csr: interpret length as CSR size, not number of bus words 2017-08-31 13:34:48 +08:00
spi.py spi: add diff_term, save power on outputs 2018-01-02 13:20:47 +01:00