38388d1136
conda: bump migen
2017-09-27 19:02:37 +02:00
2821f50884
conda: jesd204b 0.4
2017-09-27 17:17:04 +02:00
whitequark
7799413a41
firmware: update Rust from 1.18.0 to 1.20.0.
2017-09-24 22:51:44 +00:00
7fe5d737dd
conda: bump migen/misoc
2017-09-06 19:21:15 +08:00
34ec37ac85
conda: bump misoc
2017-09-06 11:09:38 +08:00
c5fe2799cf
conda: bump misoc
2017-08-31 13:44:31 +08:00
5a041c24f3
conda: bump misoc
2017-08-31 12:17:52 +08:00
e652221221
conda: bump migen and misoc
2017-08-31 11:50:32 +08:00
34ddda7a0c
conda: use single-tap proxy bitstreams
2017-08-15 14:30:53 -06:00
5c66b63768
setup.py etc: update license
2017-07-18 11:31:43 +02:00
9045b4cc19
drtio: initial firmware support for multi-link
2017-07-18 00:40:21 +08:00
0253db0421
conda: fix misoc git hash
2017-07-13 19:32:03 +08:00
4deb5f6a45
gateware: use new MiSoC Wishbone address system
2017-07-13 19:16:49 +08:00
mntng
40ca951750
kc705: add SPI bus for memory card
...
This will be useful for SPI unit tests using a SD card as victim.
2017-07-12 00:27:44 +08:00
60809d1cb4
conda: bump misoc (migen change)
2017-07-04 11:58:12 +02:00
Florent Kermarrec
42476c64a7
conda: bump migen (Record.connect leave_out --> keep/omit)
2017-07-04 11:26:57 +02:00
5b26e5de6c
conda: bump migen (reset_less cdc)
2017-07-02 15:41:58 +02:00
6fad15c532
conda: bump migen, misoc
...
* reset_less Cordic
* Signal.like() inherits more
* address decoder changes
2017-06-28 20:56:43 +02:00
f4624e086a
conda: bump migen
2017-06-25 21:14:52 +02:00
10fb6c6216
conda: set ignore_prefix_files on all board packages
2017-06-15 16:25:52 +08:00
5e94810e84
Revert "Revert "conda: use new noarch system for board packages as well""
...
This reverts commit 832fb139a0
2017-06-15 16:10:58 +08:00
832fb139a0
Revert "conda: use new noarch system for board packages as well"
...
Never missing an opportunity to be awful, conda helps itself with the .fbi files and merrily patches the strings inside them that contain paths resembling the conda build folder, resulting of course in corrupption and CRC errors.
This reverts commit c856b22579
2017-06-15 16:00:00 +08:00
ed2b27fed2
conda: fix pythonparser dependency
2017-06-14 12:39:29 +08:00
whitequark
53f7d145a4
conda: update pythonparser dependency.
2017-06-14 03:35:54 +00:00
70a3b66c76
conda: unbreak channel lists in environment descriptions
2017-06-06 15:57:38 +08:00
e938b35e8e
conda: fix command examples in conda environment descriptions
2017-06-06 15:26:26 +08:00
c856b22579
conda: use new noarch system for board packages as well
2017-06-06 15:05:13 +08:00
5a134c82c5
conda: use new noarch system
2017-06-06 11:16:12 +08:00
7f2f0031d6
conda: use stock dateutil package
2017-06-05 17:57:35 +08:00
0b437c7645
conda: shorten git hash in strings to 8 characters instead of 12
2017-06-05 11:43:10 +08:00
234e41df9d
bump setuptools ( #705 )
2017-06-05 11:39:42 +08:00
fdb4e3f8cf
jesd204: bump
2017-06-05 01:17:46 +08:00
8c8203ef73
require Python 3.5.3+ ( #737 )
2017-06-05 00:50:54 +08:00
9ab63920e0
Remove Pipistrello support
...
Closes #658
Closes #381
2017-05-15 17:17:44 +08:00
e87b6b99f7
depend on python >=3.5.2 <3.6
2017-05-11 15:05:00 +02:00
whitequark
d383145752
conda: use GIT_FULL_HASH rather than GIT_DESCRIBE_HASH.
2017-04-20 16:58:38 +00:00
whitequark
c9b20a1765
Commit missing parts of 0d0ddf2e.
2017-04-20 16:53:16 +00:00
whitequark
0d0ddf2e58
conda: limit git hashes in build numbers to 8 chars exactly.
...
Before this commit, a nasty edge case was possible where repositories
on different builders have had different sets of objects fetched
into them, and so git-describe selected different lengths for
abbreviating hashes.
See also https://github.com/conda/conda-build/issues/1940 .
2017-04-20 16:40:10 +00:00
whitequark
af20e7ede4
conda: update rust dependency.
2017-04-19 12:53:13 +00:00
whitequark
5324a42549
conda: update rust dependency.
2017-04-19 11:18:14 +00:00
whitequark
db494967c5
firmware use Rust 0.18.0.
2017-04-19 09:38:24 +00:00
99196986c0
conda: use conda-forge and depend on pyqtgraph 0.10.0 ( #704 )
2017-04-13 00:55:16 +08:00
6d1046cae2
conda: use python 3.5.3
2017-03-29 09:39:02 +08:00
whitequark
618942bda6
conda: bump misoc.
2017-03-14 08:35:04 +00:00
1dbfaf5ad0
Revert "conda: bump misoc (pcu/ISE fix)"
...
This reverts commit d5d3e25f97
2017-03-08 23:15:23 +01:00
0c959ba6ea
Revert "conda: actually bump misoc (pcu/ISE fix)"
...
This reverts commit ccc4cf8a22
2017-03-08 23:15:21 +01:00
ccc4cf8a22
conda: actually bump misoc (pcu/ISE fix)
2017-03-08 17:34:38 +01:00
d5d3e25f97
conda: bump misoc (pcu/ISE fix)
2017-03-08 17:32:59 +01:00
whitequark
12e22823a2
conda: update misoc dependency.
2017-03-06 13:23:43 +00:00
3c50c46a81
conda: pyqt >= 5.5
2017-02-28 13:22:39 +01:00
34421ee2f4
conda: use anaconda default pyqt ( fixes #670 )
2017-02-28 10:38:46 +00:00
8da28177a4
conda: bump migen
2017-02-20 15:52:05 +08:00
3e2dad6573
misoc: bump (mor1kx pcu)
2017-02-18 14:09:12 +01:00
whitequark
f4ae166a4c
conda: fix syntax.
2017-02-05 16:46:11 +00:00
whitequark
52a046d0fd
conda: roll cargo back to 0.11.0, then fix revision of compiler_builtins.
2017-02-05 15:25:43 +00:00
whitequark
3de19f6786
conda: use verbose misoc build.
2017-02-05 14:26:08 +00:00
whitequark
990b642461
conda: bump cargo dependency to >= 0.16.0.
...
We currently have cargo ignoring and recreating the lockfile on CI,
which is probably caused by it being too old.
2017-02-05 13:55:15 +00:00
whitequark
6d094eda32
conda: bump rust dependency.
2017-02-05 09:00:45 +00:00
whitequark
b9cbedceb1
firmware: migrate last vestiges of the old runtime build system.
2017-02-03 12:59:35 +00:00
5a30536d59
doc: write section on developing with a conda env
2017-02-02 19:53:18 +01:00
edab068ac9
conda: pull in openocd in artiq and artiq-dev
2017-02-02 19:53:18 +01:00
e23be49208
conda: clean up dependencies
2017-02-01 22:26:12 +01:00
e93f610323
conda/artiq: don't need numpy or binutils to build
2017-02-01 21:48:15 +01:00
fb56c32d35
conda: use artiq-dev metapackage
2017-02-01 15:34:05 +01:00
whitequark
c585784cd9
conda: bump misoc dependency.
2017-01-30 08:03:41 +00:00
bff5f1b714
conda: update migen
2017-01-30 13:39:44 +08:00
9e92706d09
conda: pin misoc/migen package hashes
2017-01-27 14:43:24 +01:00
whitequark
c529cefc89
conda: bump llvmlite-artiq dependency.
2017-01-27 11:14:53 +00:00
c43adbf846
conda: add artiq-dev environment description
2017-01-26 19:55:39 +01:00
6c637537f0
doc/conda: fix conda env description syntax
2017-01-26 18:14:58 +01:00
8a13c8c195
doc: use minimal conda environment to build
2017-01-26 18:12:10 +01:00
aa3af4f72d
conda: fix sphinx pin
2017-01-26 00:53:43 +01:00
151b51f836
conda: pin sphinx to 1.4.8 ( closes #645 )
...
can be reverted when https://github.com/snide/sphinx_rtd_theme/pull/346 is
released
2017-01-26 00:51:26 +01:00
fe53bab953
targets: kc705 -> kc705_dds
2017-01-05 18:40:56 +01:00
whitequark
c45a170bb4
firmware: update for Rust 1.16.0.
2016-12-26 17:20:29 +00:00
ca636ef28a
conda/phaser: build-depend on numpy
2016-12-08 16:23:40 +01:00
7657cf1264
phaser: bump misoc/migen
2016-11-29 14:55:15 +01:00
41779367b5
phaser: adapt conda recipe
2016-11-24 16:04:13 +01:00
4160490e0a
Merge branch 'phaser' into phaser2
...
* phaser: (23 commits)
RELEASE_NOTES: update
pipistrello: add some inputs
Remove last vestiges of nist_qc1.
Fully drop AD9858 and kc705-nist_qc1 support (closes #576 ).
coredevice.dds: reimplement fully in ARTIQ Python.
compiler: unbreak casts to int32/int64.
analyses.constness: fix false positive on x[...].
inferencer: significantly improve the op-assignment diagnostic.
Fix tests.
Move mu_to_seconds, seconds_to_mu to Core.
artiq_devtool: don't crash on invalid utf-8.
artiq_devtool: detect a race condition during connect.
llvm_ir_generator: handle no-op coercions.
conda: use development version of migen/misoc
Revert accidentally committed code.
Revert "gateware: increase RTIO FIFO sizes for NIST_CLOCK. Closes #623 "
analyses.invariant_detection: implement (#622 ).
Fix whitespace.
coredevice.dds: work around the round(numpy.float64()) snafu.
coredevice.dds: update from obsolete int(width=) syntax (fixes #621 ).
...
2016-11-21 17:29:46 +01:00
f7e8961ab0
Merge branch 'master' into phaser
...
* master: (23 commits)
RELEASE_NOTES: update
pipistrello: add some inputs
Remove last vestiges of nist_qc1.
Fully drop AD9858 and kc705-nist_qc1 support (closes #576 ).
coredevice.dds: reimplement fully in ARTIQ Python.
compiler: unbreak casts to int32/int64.
analyses.constness: fix false positive on x[...].
inferencer: significantly improve the op-assignment diagnostic.
Fix tests.
Move mu_to_seconds, seconds_to_mu to Core.
artiq_devtool: don't crash on invalid utf-8.
artiq_devtool: detect a race condition during connect.
llvm_ir_generator: handle no-op coercions.
conda: use development version of migen/misoc
Revert accidentally committed code.
Revert "gateware: increase RTIO FIFO sizes for NIST_CLOCK. Closes #623 "
analyses.invariant_detection: implement (#622 ).
Fix whitespace.
coredevice.dds: work around the round(numpy.float64()) snafu.
coredevice.dds: update from obsolete int(width=) syntax (fixes #621 ).
...
2016-11-21 17:29:39 +01:00
whitequark
6aa5d9f6c6
Remove last vestiges of nist_qc1.
2016-11-21 15:36:22 +00:00
whitequark
5e8888d5f3
Fully drop AD9858 and kc705-nist_qc1 support ( closes #576 ).
2016-11-21 15:14:17 +00:00
eb18466820
conda: use development version of migen/misoc
2016-11-20 22:56:48 +08:00
7664b226f2
phaser/conda: bump jesd204b
2016-11-18 15:34:03 +01:00
aedb6747f2
Merge branch 'master' into phaser
...
* master: (47 commits)
runtime: disable the Nagle algorithm entirely.
runtime: buffer RPC send packets.
runtime: don't print debug messages to the UART.
runtime: print microsecond timestamps in debug messages.
artiq_devtool: abort if build failed.
conda: bump llvmlite-artiq dep.
conda: bump llvmlite-artiq dep.
llvm_ir_generator: use !{→unconditionally.}invariant.load metadata.
artiq_devtool: more robust port forwarding.
setup: remove paramiko dependency (optional and developer-only)
artiq_devtool: implement.
artiq_compile: actually disable attribute writeback.
conda: use pythonparser 1.0.
conda: tighten pythonparser dependency (fixes #600 ).
doc: clarify kernel_invariant doc (fixes #609 ).
compiler: Emit all-kernel_invariant objects as LLVM constants
conda: update for LLVM 3.9.
add has_dds, use config flags
Revert "Revert "Revert "Revert "Update for LLVM 3.9.""""
Revert "Revert "Revert "Update for LLVM 3.9."""
...
2016-11-13 16:54:28 +01:00
whitequark
7c2b1155ef
conda: bump llvmlite-artiq dep.
2016-11-12 13:58:00 +00:00
whitequark
5eb940deb7
conda: bump llvmlite-artiq dep.
2016-11-12 04:09:34 +00:00
whitequark
67e743d74a
conda: use pythonparser 1.0.
2016-11-09 15:19:27 +00:00
whitequark
71f1d38860
conda: tighten pythonparser dependency ( fixes #600 ).
2016-11-09 15:10:53 +00:00
whitequark
124b257e05
conda: update for LLVM 3.9.
2016-11-08 23:24:03 +00:00
whitequark
ec8fe6f8bd
Revert "Revert "Revert "Revert "Update for LLVM 3.9.""""
...
This reverts commit 7b81ed1d18
2016-11-08 14:22:47 +00:00
whitequark
7b81ed1d18
Revert "Revert "Revert "Update for LLVM 3.9."""
...
This reverts commit 0d7688017b
2016-11-08 12:58:20 +00:00
whitequark
0d7688017b
Revert "Revert "Update for LLVM 3.9.""
...
This reverts commit 5f5975844a
2016-11-08 11:59:16 +00:00
6d07a16c62
Merge branch 'master' into phaser
...
* master: (72 commits)
gateware: extend mailbox to 3 entries.
master/worker_db: set default value for archive
master: keep dataset manager consistent when set_dataset is called with contradictory attributes
master: archive input datasets. Closes #587
master: ensure same dataset is in broadcast and local when mutating
scheduler: default submission arguments, closes #577
pdq2: sync with pdq2
doc: clarify usage of pause/check_pause, closes #571
dashboard/datasets: use scientific spinbox and increase number of decimals, closes #572
gateware/spi: fix import
runtime: fix use of $(realpath) in Makefile.
test: fix printf specifier.
llvm_ir_generator: make sure RPC allocations are not underaligned.
runtime: use i64 for watchdog timeout, not i32.
runtime: port ksupport to Rust.
runtime: remove some redundant libm functions copied inline.
language: Add "A" (ampere) as well-known unit for arguments
conda: misoc 0.4 (csr)
runtime: cap log level at debug.
runtime: discard unnecessary sections.
...
2016-10-28 01:40:11 +02:00
062aca2a6b
conda/phaser: build-depend on jesd204b
2016-10-19 14:44:54 +02:00
81511feab8
phaser: README: specify versions
2016-10-12 17:13:06 +02:00
290498aca0
conda: misoc 0.4 (csr)
2016-10-12 16:34:19 +02:00
4a0eaf0f95
phaser: add jesd204b rtio dds
...
gateware: add jesd204b awg
gateware: copy phaser (df3825a)
dsp/tools: update satadd mixin
phaser: no DDS stubs
dsp: accu fix
phaser: cleanup/reduce
sawg: kernel support and docs
sawg: coredevice api fixes
sawg: example ddb/experiment
phaser: add conda package
examples/phaser: typo
sawg: adapt tests, fix accu stb
sawg: tweak dds parameters
sawg: move/adapt/extend tests
sawg: test phy, refactor
phaser: non-rtio spi
phaser: target cli update
phaser: ad9154-fmc-ebz pins
phaser: reorganize fmc signal naming
phaser: add test mode stubs
phaser: txen is LVTTL
phaser: clk spi xfer test
phaser: spi for ad9154 and ad9516
phaser: spi tweaks
ad9154: add register map from ad9144.xml
ad9516: add register map from ad9517.xml and manual adaptation
ad9154_reg: just generate getter/setter macros as well
ad9154: reg WIP
ad9154: check and fix registers
kc705: single ended rtio_external_clk
use single ended user_sma_clk_n instead of p/n to free up one clock sma
kc705: mirror clk200 at user_sma_clock_p
ad9516_regs.h: fix B_COUNTER_MSB
phase: wire up clocking differently
needs patched misoc
kc705: feed rtio_external_clock directly
kc705: remove rtio_external_clk for phaser
phaser: spi tweaks
ad9516: some startup
ad9516_reg fixes
phaser: setup ad9516 for supposed 500 MHz operation
ad9516: use full duplex spi
ad9154_reg: add CONFIG_REG_2
ad9154_reg: fixes
phaser: write some ad9154 config
ad9154_reg: fixes
ad9154: more init, and human readable setup
ad9154/ad9516: merge spi support
ad9154: status readout
Revert "kc705: remove rtio_external_clk for phaser"
This reverts commit d500288bb44f2bf2eeb0c2f237aa207b0a8b1366.
Revert "kc705: feed rtio_external_clock directly"
This reverts commit 8dc7825519e3e75b7d3d29c9abf10fc6e3a8b4c5.
Revert "phase: wire up clocking differently"
This reverts commit ad9cc450ffa35abb54b0842d56f6cf6c53c6fbcc.
Revert "kc705: mirror clk200 at user_sma_clock_p"
This reverts commit 7f0dffdcdd28e648af84725682f82ec6e5642eba.
Revert "kc705: single ended rtio_external_clk"
This reverts commit a9426d983fbf5c1cb768da8f1da26d9b7335e9cf.
ad9516: 2000 MHz clock
phaser: test clock dist
phaser: test freqs
ad9154: iostandards
phaser: drop clock monitor
phaser: no separate i2c
phaser: drive rtio from refclk, wire up sysref
phaser: ttl channel for sync
ad9154: 4x interp, status, tweaks
phaser: sync/sysref 33V banks
phaser: sync/sysref LVDS_25 inputs are VCCO tolerant
phaser: user input-only ttls
phaser: rtio fully from refclk
ad9154: reg name usage fix
ad9154: check register modifications
Revert "ad9154: check register modifications"
This reverts commit 45121d90edf89f7bd8703503f9f317ad050f9564.
ad9154: fix status code
ad9154: addrinc, recal serdes pll
phaser: coredevice, example tweaks
sawg: missing import
sawg: type fixes
ad9514: move setup functions
ad9154: msb first also decreasing addr
phaser: use sys4x for rtio internal ref
phaser: move init code to main
phaser: naming cleanup
phaser: cleanup pins
phaser: move spi to kernel cpu
phaser: kernel support for ad9154 spi
ad9154: add r/w methods
ad9154: need return annotations
ad9154: r/w methods are kernels
ad9154_reg: portable helpers
phaser: cleanup startup kernel
ad9154: status test
ad9154: prbs test
ad9154: move setup, document
phaser: more documentation
2016-10-05 16:17:50 +02:00
2701b914e2
conda: update migen version requirements
2016-09-24 21:02:19 +08:00
5b713ea385
conda: fix nist_clock summary
2016-09-02 19:06:36 +02:00
