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1,583 Commits 63 Branches 34 Tags 19 MiB
a3284f8978
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Author SHA1 Message Date
whitequark
a3284f8978 compiler.types: fix module paths in __repr__. 2015-08-27 15:46:36 -05:00
whitequark
84e32db622 LLVMIRGenerator: handle self-referential class types. 2015-08-27 15:40:46 -05:00
whitequark
71ebe1778d LLVMIRGenerator: remove debug print. 2015-08-27 15:40:15 -05:00
whitequark
f7c8625f61 compiler.embedding: support calling methods via RPC as well. 2015-08-27 05:56:46 -05:00
whitequark
c62b16d5e1 compiler.embedding: support RPC functions as host attribute values. 2015-08-27 05:53:18 -05:00
whitequark
04bd2421ad compiler.embedding: dedent kernel functions before parsing. 2015-08-27 05:44:56 -05:00
whitequark
cb225269ff Allow accessing attributes of embedded host objects. 2015-08-27 05:01:04 -05:00
whitequark
422208a0e9 Fix copy-paste error. 2015-08-25 22:05:34 -07:00
whitequark
9b9fa1ab7c Allow embedding and RPC sending host objects. 2015-08-25 21:56:01 -07:00
whitequark
526d7c4e46 Fix a typo. 2015-08-22 14:01:55 -07:00
whitequark
a557445e05 LocalAccessValidator: assume variables with "$" in name are internal. 
Internal variables are assumed to be scoped correctly
(including not being accessed uninitialized).

This was changed from "." because artiq.compiler.embedding uses
"." in module prefix of function names.
 2015-08-22 13:56:17 -07:00
whitequark
0e26cfb66e LocalAccessValidator: relax restrictions to accept def f(); def g(). 2015-08-22 13:31:09 -07:00
whitequark
b39e76ae28 Remove debug print. 2015-08-22 12:22:26 -07:00
whitequark
27a697920a LLVMIRGenerator: use sret when returning large structures. 2015-08-19 15:06:03 -07:00
whitequark
673512f356 coredevice.core: fix imports. 2015-08-19 12:37:31 -07:00
whitequark
afc3f36104 ARTIQIRGenerator: fix polymorphic print on closures. 2015-08-19 12:37:22 -07:00
whitequark
53b4d87647 LLVMIRGenerator: attach debug metadata to all emitted LLVM instructions. 2015-08-19 12:18:20 -07:00
whitequark
51c591f01a Unbreak tests. 2015-08-18 22:44:09 -07:00
whitequark
6c8de9b6d4 Implement methods. 2015-08-18 22:39:22 -07:00
whitequark
1040a409c3 lit-test: fix tests incorrectly assuming an OutputCheck step. 2015-08-18 15:05:43 -07:00
whitequark
94a2d5f5fa Implement class attribute access through instances. 2015-08-15 11:07:54 -04:00
whitequark
00efc8c636 Implement class definitions and class attribute access. 2015-08-15 09:45:16 -04:00
whitequark
fd3c8a2830 language.core: remove {int,round}64, implement int with device semantics. 2015-08-11 12:57:17 +03:00
whitequark
786fde827a Unbreak tests. 2015-08-11 00:41:31 +03:00
whitequark
200330a808 Remove parts of py2llvm that are implemented in the new compiler. 2015-08-10 20:36:39 +03:00
whitequark
62e6f8a03d compiler.embedding.Stitcher: refactor. 2015-08-10 20:26:07 +03:00
whitequark
46476516ba ARTIQException: tell linecache where to look for runtime sources. 
Runtime sources can appear in the backtrace when
artiq_raise_from_c is used.
 2015-08-10 20:26:07 +03:00
whitequark
c72267ecf5 Implement syscalls for the new compiler. 2015-08-10 20:26:06 +03:00
whitequark
435559fe50 Allow type annotations on remotely called functions. 2015-08-10 17:48:35 +03:00
whitequark
b28a874274 Inferencer: range() does not accept a float argument. 2015-08-10 17:06:55 +03:00
whitequark
f53a5ff202 Remove syscall builtin. 2015-08-10 16:44:29 +03:00
whitequark
261515dfe5 compiler.targets.OR1KTarget: fix typo. 2015-08-10 15:47:44 +03:00
whitequark
75532d10aa Display full core device backtraces. 2015-08-10 15:12:22 +03:00
whitequark
c63ec70c53 LLVMIRGenerator: emit debug information. 2015-08-10 15:11:52 +03:00
whitequark
4f02f6e667 compiler.types: make all hashable. 2015-08-10 13:15:42 +03:00
whitequark
8f510a4407 compiler.ir.Function: add loc field. 2015-08-10 13:14:52 +03:00
whitequark
22570afbda LLVMIRGenerator: allocate less. 2015-08-10 09:12:34 +03:00
whitequark
b99eae6b3f session.c: send_rpc_value: fix list serialization. 2015-08-09 20:36:14 +03:00
whitequark
dfc91a35f2 ARTIQIRGenerator.polymorphic_print: str([x]) uses repr(x), not str(x). 2015-08-09 20:27:04 +03:00
whitequark
f7b64db8f4 LLVMIRGenerator: fixup phis on expansion of ARTIQ instructions. 2015-08-09 20:24:16 +03:00
whitequark
d4270cf66e Implement receiving data from RPCs. 2015-08-09 20:17:00 +03:00
whitequark
02b1543c63 Implement receiving exceptions from RPCs. 2015-08-09 16:16:41 +03:00
whitequark
8b7d38d203 Add ARTIQ_DUMP_ASSEMBLY. 2015-08-09 15:47:29 +03:00
whitequark
9c5ca2ae29 LLVMIRGenerator: add target data layout to LLVM modules. 2015-08-09 14:39:21 +03:00
whitequark
153592f1cc Naming. 2015-08-09 02:25:58 +03:00
whitequark
b26af5df60 Implement sending RPCs. 2015-08-09 02:17:19 +03:00
whitequark
22457bc19c Ensure uwtable is added to all generated functions. 2015-08-08 21:48:21 +03:00
whitequark
13ad9b5d08 Allow to dump ARTIQ/LLVM IR for stitched code. 2015-08-08 21:47:20 +03:00
whitequark
ee3f35c608 Improve error message on passing an argument twice. 2015-08-08 21:06:13 +03:00
whitequark
bdcf7f100b ARTIQIRGenerator: add semantic locs to all other implicitly raised exceptions. 2015-08-08 16:26:53 +03:00