This regularly leads to people misunderstanding the setting.
Mentioning the Si5324 specifically or Urukul synchronization doesn't help constraining or explaining the feature, its consequences and requirements.
Despite being non-standard this feature is also generally not sufficient to achieve cross-device determinism as the other devices need to be made deterministic as well.
We need to check if our inference reached a fixed point. This is checked
using hash of the types in the AST, which is very slow. This patch
avoids computing the hash if we can make sure that the AST is definitely
changed, which is when we parse a new function.
For some simple programs with many functions, this can significantly
reduce the compile time by up to ~30%.
According to PEP484, type hint can be a string literal for forward
references. With PEP563, type hint would be preserved in annotations in
string form.
Previous to this commit `set_nco_phase()` set the phase of the DUC instead
of the NCO. Setting the phase of the NCO may be desirable to utilise the
auto-sync functionality of the double-buffered DAC-NCO settings.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
1. Clarify which features require additional configuration via the `dac`
constructor argument.
2. Document when DAC settings apply immediatly/are staged.
3. Document how staged DAC settings may be applied
4. Calrify operation of `dac_sync`
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
When Phaser is powered on and `init()` is first called, enabling the
DAC-mixer while leaving the NCO disabled causes malformed output.
This commit implements a workaround by making sure the NCO is enabled,
before being set to the disired state.
This commit also avoids the following procedure, resulting in
malformed output:
1. Operate Phaser with the DAC Mixer and NCO enabled
2. Set the NCO to a non-zero frequency
3. Disable the NCO in the device_db
4. Re-initialise Phaser
After this procedure, with CMIX disabled, incorrect output is produced.
To clear the fault one must re-enable the NCO and write the NCO freqeuncy
to zero before disabling the NCO.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
The CMIX bits are bits 12-15 in register 0x0d. This has been checked
against the datasheet and verified on hardware. Until now, the bit for
CMIX1 was written to CMIX0. The CMIX0 bit was written to a reserved bit.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
