5b26e5de6c
conda: bump migen (reset_less cdc)
2017-07-02 15:41:58 +02:00
d7ad72efa2
doc: point to artiq_flash hardware selection options when writing flash storage. Closes #766
2017-07-02 10:40:52 +08:00
838127d914
rtio: break DMA timing path
2017-07-02 10:24:01 +08:00
whitequark
ea7549cfa4
compiler: coerce while condition to bool.
...
Fixes #768 .
2017-07-01 18:59:07 +00:00
911ee4a959
rtio: make pipelined logic reset_less
...
* latency-corrected counters
* registered error logic
2017-06-29 12:55:32 +02:00
600a48ac61
dsp.fir: cleanup
2017-06-29 12:18:48 +02:00
dca662a743
dsp.fir: pipeline final systolic adder
2017-06-29 11:33:19 +02:00
32a33500c8
dsp.fir: actively cull zero delays
2017-06-29 11:24:56 +02:00
f520d4a768
rtio: undo _RelaxedAsyncResetSynchronizer
2017-06-28 22:08:15 +02:00
6fad15c532
conda: bump migen, misoc
...
* reset_less Cordic
* Signal.like() inherits more
* address decoder changes
2017-06-28 20:56:43 +02:00
3cbbcdfe96
sawg: don't enable_replace for Config
...
closes #762
2017-06-28 20:31:40 +02:00
f2632e0fd1
sawg: adapt latency to fir changes
...
closes #748
2017-06-28 20:12:30 +02:00
e7db2c6578
dsp.accu: reset_less outputs
2017-06-28 20:04:58 +02:00
6bb994228f
dsp.fir: drop x shift
2017-06-28 19:55:15 +02:00
01847271c5
rtio: use reset_less signal for reset fanout
2017-06-28 19:43:55 +02:00
b9859cc0c3
dsp.fir: remove old/wrong comment
2017-06-28 19:21:57 +02:00
55b5b87490
fir: simplify latency compensation
...
Don't try to tweak out the last bit of latency by feeding the HBF input
early. Instead feed it late so the interpolated samples are early and
the latency is an even multiple of the super-sample cycle.
2017-06-28 19:13:43 +02:00
d1e5dd334f
sawg: use pipeline reset
2017-06-28 19:09:39 +02:00
6418205906
dsp.fir: use pipelin-reset
2017-06-28 19:09:21 +02:00
whitequark
6a49c114c8
runtime: update smoltcp.
2017-06-28 00:27:22 +00:00
whitequark
370f22541c
runtime: update smoltcp.
2017-06-27 21:06:45 +00:00
whitequark
f36f00a83d
artiq_devtool: do not chop up the TCP stream into 1024 byte chunks.
...
This makes the smoltcp behavior quite different than without
the TCP forwarding (and can mask smoltcp issues).
2017-06-26 08:39:16 +00:00
whitequark
282f4256e0
artiq_pcap: atomically replace pcap file.
...
Otherwise this segfaults Wireshark (?!).
2017-06-26 03:22:14 +00:00
whitequark
d6f4f1f3bc
artiq_devtool, artiq_pcap: better option naming.
2017-06-26 00:00:05 +00:00
f4624e086a
conda: bump migen
2017-06-25 21:14:52 +02:00
whitequark
6061393bd0
tools: lazily import paramiko.
2017-06-25 07:17:03 +00:00
whitequark
816ec6c52f
artiq_pcap: implement.
2017-06-25 07:04:29 +00:00
whitequark
69fa9b38e0
test: actually run test_embedding.AsyncTest.
2017-06-25 05:28:32 +00:00
whitequark
31b52ff1b3
coredevice: do not desync kernel TCP stream on RPCReturnValueError.
...
And propagate the error upwards instead of trying to squeeze it
through the core device in futility.
2017-06-25 04:47:32 +00:00
whitequark
fdb24ef139
coredevice: truncate overlong exception messages.
...
If we have a really long one (megabytes) then this may exhaust
the heap of the core device and crash it.
2017-06-25 04:39:08 +00:00
whitequark
1fa8be3835
artiq_devtool: don't loop forever if core device dies.
2017-06-25 04:18:45 +00:00
whitequark
f17a6616b2
runtime: ensure management interface buffer can hold log buffer.
...
Otherwise we get weird edge cases where the network stack could try
to append to log buffer while management interface is holding
the log buffer and trying to push it out, and it's just no good.
The serialized log buffer at its maximum length is slightly longer
than 32 KiB, so we just allocate the largest possible TCP buffer
to the management interface to keep it simple.
2017-06-24 17:09:28 +00:00
whitequark
d0f72632e1
language: export TBytes and TByteArray.
2017-06-24 17:03:35 +00:00
whitequark
12357d884e
runtime: update smoltcp.
2017-06-24 16:55:59 +00:00
07f5e99140
dsp/sat_add: works after previous changes
2017-06-22 18:24:22 +02:00
f78d5a87e9
dsp/test: skip and fix sat_add
2017-06-22 18:01:31 +02:00
47928a2c0d
sawg: disable limiter
...
temporary workaround to permit testing other aspects
2017-06-22 17:31:04 +02:00
cd2ac53bc5
dsp/sat_add: make width mandatory
2017-06-22 17:28:39 +02:00
9b940aa876
dsp/sat_add: spell out logic more
2017-06-22 16:55:13 +02:00
d0cf0f2b87
sawg/limiter: make signed signals explicitly
2017-06-22 13:44:36 +02:00
53be34a25f
sawg: clear phase accu in reset
2017-06-22 13:27:49 +02:00
694f8d784c
dsp/tools: unittest sat_add
2017-06-22 11:29:56 +02:00
bd1438d28e
sawg: wrap limits init values
2017-06-22 10:26:29 +02:00
cccd01e81e
sawg: cleanup sat_add logic
2017-06-22 10:26:29 +02:00
5f6e665158
test/sawg: patch delay_mu
2017-06-22 10:26:29 +02:00
570f2cc1ff
dsp/tools/SatAdd: fix reuse of clipped signal
2017-06-22 10:26:29 +02:00
4b3aad2563
sawg: clean up Config
...
* unify I and Q data limiters. there is no conceivable way why they
would be different.
* reorder clr bits to be like consistent
* move the sat add limiter to before the hbf again
2017-06-22 10:26:29 +02:00
f4c6879c76
sawg: special case Config RTIO address
2017-06-22 10:26:29 +02:00
ff0da2c9fc
sawg: stage code for y-data exchange on channels
2017-06-22 10:26:29 +02:00
b6569df02f
dsp/tools: clean up SatAddMixin logic
2017-06-22 10:26:29 +02:00
