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Author SHA1 Message Date
Robert Jördens f62c1ff0bb TTLClockGen: expose acc_width
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:27 +01:00
Robert Jördens f755a4682a device_db_ptb: fix zotino clr
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:24 +01:00
David Nadlinger abad916383 RELEASE_NOTES: Fix typo 2018-11-03 20:33:19 +08:00
David Nadlinger 8b5df9c151 RELEASE_NOTES: TTL timeline cursor API changes 2018-11-03 20:33:19 +08:00
David Nadlinger f79b9d9e1e ttl: Expand input gate/count API docstrings 2018-11-03 20:33:19 +08:00
David Nadlinger f02ceee626 language: Clarify now_mu() docstring [nfc] 2018-11-03 20:33:19 +08:00
David Nadlinger e7d3f36b91 doc: Fix ancient trigger code in slides
These examples were already broken before my recent changes to the
artiq.coredevice.ttl API.
2018-11-03 20:33:19 +08:00
David Nadlinger 5d2e3f975f coredevice: Add get_rtio_counter_mu() docstring [nfc] 2018-11-03 20:33:19 +08:00
David Nadlinger d6fcc0529f coredevice: Imperative mood in docstrings [nfc]
This follows Python conventions (PEP257) and unifies the style with
other comments.
2018-11-03 20:33:19 +08:00
David Nadlinger cbdef0225c ttl: Add target RTIO time argument to timestamp/count functions
Software-based tracking of timestamps is problematic (e.g. when
using DMA, see GitHub #1113).
2018-11-03 20:33:19 +08:00
David Nadlinger 2a0e1dabfb ttl: Remove unused attribute [nfc] 2018-11-03 20:33:19 +08:00
David Nadlinger 17a5fb2dce ttl: Remove error-prone sync() calls
These methods are problematic, as with DMA in the picture, the
timestamp member variables did not necessarily reflect the last
submitted event timestamp (see GitHub #1113).

sync() is only very rarely used in typical experimental code, so
the methods are removed without a transition period.
Core.wait_until() can be used to busy-wait for a specified RTIO
timestamp value on the core device CPU instead.
2018-11-03 20:33:19 +08:00
David Nadlinger 11e8c9d5f7 coredevice: Add Core.wait_until_mu()
(This supersedes TTLOut.sync(), see see GitHub #1113.)
2018-11-03 20:33:19 +08:00
David Nadlinger cbfbe24d7a ttl: Remove broken TTLClockGen.sync
The code currently doesn't compile because of a typo in the timestamp
field name. However, tracking event timestamps in software is
problematic anyway (e.g. with DMA, see GitHub #1113), so just remove
`sync()` altogether.
2018-11-03 20:33:19 +08:00
Sebastien Bourdeauducq 7f11411127 RELEASE_NOTES: 3.7 2018-11-03 20:17:28 +08:00
Sebastien Bourdeauducq bc4a8157c0 kasli: add tsinghua2 2018-11-01 18:26:37 +08:00
David Nadlinger 91f0d640e2
.github: Match suggested commit message format to established convention
This changes the suggested format for commit messages to match the
convention actually used here (no square brackets).
2018-10-25 22:01:14 +01:00
Robert Jördens 89a961fb00 urukul, ad9912, ad9910: expose CFG RF switch better
* conincident setting of multiple switches
* per channel setting
2018-10-24 13:04:46 +02:00
Drew 4e04b6b4dd [template]: fix 3_question.md template use of ":"
Question.md didn't display on ARTIQ new issue page.
Solution: Cannot use ":" in Markdown header

Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
2018-10-23 23:01:58 +08:00
Drew 761d30d998 [template]: Reorder pull request template
PR template wasn't in a logical order, hard for maintainers to read. Reorganized.
Fix directory where docs are built from.

Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
2018-10-23 23:01:22 +08:00
Sebastien Bourdeauducq 0b43ec4719 conda: bump migen 2018-10-21 14:33:14 +08:00
Sebastien Bourdeauducq 48a142ed63 use FutureWarning instead of DeprecationWarning
DeprecationWarning is disabled by default and too easy to ignore.
2018-10-21 12:14:51 +08:00
Sebastien Bourdeauducq 9793632282 enviromnment: rename 'save' in set_dataset to 'archive'. Closes #1171 2018-10-21 12:08:34 +08:00
Marius Weber 029f9d983a Tpz fixes (#1178)
*   flake8
*   fix TPZ constructor after move to asyncio
*   Tcube fix docummentation in set_channel_enable_state
2018-10-20 20:49:15 +08:00
Drew a84c6c6d74 Add issue & pull request templates (#1163) 2018-10-20 20:43:19 +08:00
Sebastien Bourdeauducq c52a6ca8e9 typo (#1179) 2018-10-20 20:40:07 +08:00
Florent Kermarrec 3318925f4e firmware/liboard_misoc/sdram: use similar loops on read_level_scan and read_level for consistent results 2018-10-16 09:40:39 +02:00
Sebastien Bourdeauducq 6357a50d33 kasli: update nudt variant 2018-10-15 18:04:57 +08:00
David Nadlinger e3cfbfed06 master: Add minimal docstring to worker_impl [nfc] 2018-10-14 10:41:32 +08:00
David Nadlinger 64b9a377da master: Factor RIDCounter out into own module, explain worker_db module [nfc]
The docstrings are quite minimal still, but should already
help with navigating the different layers when getting
accustomed with the code base.

RIDCounter was moved to its own module, as it isn't really
related to the other classes (used from master only).
2018-10-14 10:41:32 +08:00
David Nadlinger 4641ddf002 master: Remove unused import [nfc] 2018-10-14 10:41:32 +08:00
Robert Jördens 661dd00c4c ad9912: phase offset is 14 bit LSB aligned
c.f. sinara-hw/Urukul#15
2018-10-11 15:16:08 +02:00
hartytp 08074d5275 Urukul: add support for hardware v1.3 clocking options 2018-10-10 09:26:35 +02:00
Sebastien Bourdeauducq 469a66db61 drtio: monitor RTIOClockMultiplier PLL (#1155)
Debugging by Tom Harty
2018-10-08 14:50:02 +02:00
Robert Jördens 9cf88329b2 CONTRIBUTING: correct default licensing 2018-10-08 11:20:37 +02:00
hartytp 1a1b454ed9 Urukul: flake8 (NFC) 2018-10-08 10:09:49 +01:00
Robert Jördens 5de319d76a bit2bin: don't print string terminator 2018-10-08 10:13:03 +02:00
hartytp 9a509e5070 Zotino: increase delay after register read in init method to avoid underflows 2018-10-06 21:45:17 +08:00
Sebastien Bourdeauducq 86fe6b0594 kasli: add NUDT variant 2018-10-04 23:20:09 +08:00
Sebastien Bourdeauducq a89bd6b684 kasli: swap Urukul EEMs for Tester
Updated to Urukul 1.3.
2018-10-04 23:19:31 +08:00
Sebastien Bourdeauducq 9f96b6bcda kasli: use 125MHz DRTIO freq for testing 2018-10-04 10:41:01 +08:00
Sebastien Bourdeauducq 969a305c5a Merge branch 'master' into switching125 2018-10-04 10:08:42 +08:00
Robert Jördens d0ee2c2955 opticlock: external 100 MHz 2018-09-28 19:05:18 +02:00
Drew Risinger 0fef2afccb make.bat: fix typo 2018-09-27 23:22:19 +08:00
Drew Risinger fad7128a52 Create Docs Makefile for Windows. #1159
Allows building Sphinx documentation on Windows,
(not just Linux as previously).
Closes #1159.
2018-09-27 23:22:19 +08:00
Sebastien Bourdeauducq 3b3fddb5a4 kasli: add mitll2 2018-09-27 23:21:52 +08:00
Sebastien Bourdeauducq 998a468983 examples: add grabber to device databases 2018-09-27 16:09:25 +08:00
Sebastien Bourdeauducq c71e442929 documentation improvements
Based on PR #1101 by @drewrisinger
2018-09-26 12:12:37 +08:00
Sebastien Bourdeauducq b92350b0f6 drtio: monitor RTIOClockMultiplier PLL (#1155)
Debugging by Tom Harty
2018-09-26 10:52:08 +08:00
Chris Ballance 53c7a5f2c6 dashboard: fix TTL moninj level display 2018-09-26 10:32:08 +08:00