Astro 5c62716a99 zynq::eth: switch rx and tx descriptor words to vcell ... vcell can be initialized cleanly.		2019-10-31 03:15:13 +01:00
..
cortex_a9	cortex_a9: add proper L1 cache invalidation	2019-10-18 00:11:51 +02:00
zynq	zynq::eth: switch rx and tx descriptor words to vcell	2019-10-31 03:15:13 +01:00
main.rs	rm ram, add linked_list_allocator on ddr	2019-10-31 01:41:10 +01:00
regs.rs	zynq::eth: switch rx and tx descriptor words to vcell	2019-10-31 03:15:13 +01:00
stdio.rs	move slcr, clocks, uart, eth into src/zynq/	2019-10-21 22:19:03 +02:00