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4 Commits (cae02947bcc0ddee5897ec9a971788ea724e22bc)

Author SHA1 Message Date
Astro cae02947bc zynq::eth: remove all memory barriers 
They were not the solution.
 2019-11-10 23:52:55 +01:00
Astro 74c43b3477 zynq::eth::tx: clear entry.word1 for each packet 2019-11-04 02:31:40 +01:00
Astro 5c62716a99 zynq::eth: switch rx and tx descriptor words to vcell 
vcell can be initialized cleanly.
 2019-10-31 03:15:13 +01:00
Astro c046bbf8a2 move slcr, clocks, uart, eth into src/zynq/ 2019-10-21 22:19:03 +02:00