8 Commits (afd96bd887b5ca3972b9713f9d72a02ddd5a34dc)

Author	SHA1	Message	Date
Astro	afd96bd887	zynq::clocks: unlock slcr in enable_io()	2019-11-07 00:13:50 +01:00
Astro	d2df5652d0	Revert "zynq: replace unnecessary slcr::unlocked with new" ... This reverts commit 6bee1f44f4.	2019-11-07 00:13:50 +01:00
Astro	6bee1f44f4	zynq: replace unnecessary slcr::unlocked with new	2019-10-31 20:48:07 +01:00
Astro	85bd506132	zynq::ddr: parameters	2019-10-27 20:38:06 +01:00
Astro	27114aec62	zynq::ddr: fix PLL_FDIV_LOCK_PARAM usage ... this seems to make DDR RAM work.	2019-10-27 20:30:56 +01:00
Astro	9b4f07f37c	zynq::ddr, main: parameters, memtest	2019-10-25 23:19:34 +02:00
Astro	a4d3360a70	zynq::slcr: implement Display for PllStatus	2019-10-25 20:38:10 +02:00
Astro	c046bbf8a2	move slcr, clocks, uart, eth into src/zynq/	2019-10-21 22:19:03 +02:00