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57 Commits (9694b3b2686202ac41ce4edad0c013b1f1b9a393)

Author SHA1 Message Date
occheung 9694b3b268 4410: fix front panel caption 2022-01-21 13:50:32 +08:00
occheung 686f5b83cc 4410-4412: add BoM manually 2022-01-21 13:31:36 +08:00
occheung 708330a57a suservo.py: remove unnecessary import 2022-01-20 17:00:54 +08:00
occheung ac8d398f5e suservo: refrain from generating channel list 
For consistency with other DDS examples that uses multiple channels.
e.g. TTL relay external trigger, DDS synchronization
 2022-01-20 16:48:58 +08:00
occheung 8404fed3da 4410-4412: get example code from file 
Updates #24. Added example files for DDS and SUServo respectively.
 2022-01-20 16:43:45 +08:00
occheung 611a0009af bump version 2022-01-19 15:34:54 +08:00
occheung 73714d0028 4410-4412: remove symbol column except for test characteristics 2022-01-19 12:39:24 +08:00
occheung ce563bdcf1 4410-4412: remove fractions & literal word symbols 
Some of them are added in 05eba6fa.
Very certain the fraction symbols are rarely used in any other datasheets to express decibels, if any at all.
 2022-01-19 12:29:42 +08:00
occheung 972ed69593 4410-4412: fix case 2022-01-19 10:19:58 +08:00
occheung 2613df692b 4410-4412: fix dds signal spec citation 
* cite wiki instead of datasheets for frequency range, as the rest of the signal chain has low response for low frequency
* cite wiki instead of ad9912 datasheet for frequency resolution, see the ad9912 design bug on wiki
 2022-01-18 17:05:31 +08:00
occheung 00fd2df2e8 features: x-channel DDS/DAC 2022-01-18 16:02:01 +08:00
occheung 0b6c4e2b77 add the reset of the citation 
follow up of 56082b94
Update #25, #29
 2022-01-18 12:10:16 +08:00
occheung 947b3672b9 4410-4412: attenuation -> digital attenuation 
Just to not be confused with other source of attenuation/amplifications
 2022-01-18 09:57:42 +08:00
occheung b0cf38c036 4410-4412: fix output frequency symbol 2022-01-18 09:54:05 +08:00
Sebastien Bourdeauducq cd7d118f7c update disclaimers 2022-01-14 11:55:48 +08:00
occheung 439edc4302 4410-4412: fix caption punctuation again 2022-01-11 14:54:26 +08:00
occheung e4ceb32134 4410: confirm that dds amplitude at net positive input 2022-01-10 16:15:10 +08:00
occheung ca6caa8e1d 4410: leave space at the top of suservo graph 2022-01-10 16:06:56 +08:00
occheung d9ac9d3d18 4410-4412: add DIP switch doc 
plus minor reformatting
 2022-01-10 15:20:21 +08:00
occheung 876291025b 4410: fix front panel caption 
Inconsistent punctuation
 2022-01-10 15:18:33 +08:00
occheung 282b7bf244 move drawings in front of ARTIQ examples 
And some additional reformatting.
 2022-01-07 17:25:34 +08:00
occheung 3c21ccd4a0 4410: update su-servo example 
The example works after gateware fix in ARTIQ.
9d493028e5
Closes #2.
 2022-01-07 16:54:36 +08:00
occheung 05eba6faef 4410-4412: add symbols in spec table 
There are very limited usage/mentions of symbols on RF power specs (harmonics, attenuations, etc).
 2022-01-07 16:16:08 +08:00
occheung 39b10ecbd2 slightly enlarge FP drawings 2022-01-07 10:37:16 +08:00
occheung ffa71dc40c FP dimen -> FP drawings 2022-01-06 17:32:36 +08:00
occheung 026aa4cf1f 4410: add front panel drawings 2022-01-06 17:29:38 +08:00
occheung e82e798964 4410: add SU-Servo 
ARTIQ example for SU-Servo is using API prior to artiq PR 1500.
Will need to update to the latest beta at some point.
 2022-01-05 16:19:21 +08:00
occheung 01aba236ed 4410-4412: microwave source -> RF source 2022-01-04 13:17:48 +08:00
occheung 337ecbd6ae 4410-4412: add more specs 2021-12-24 16:36:58 +08:00
occheung e6674c76e4 4410-4412: add harmonic content with generic output frequencies 
https://github.com/sinara-hw/Urukul/issues/29
Other harmonic content info may become obsolete.
 2021-12-24 16:34:30 +08:00
occheung cd8c211462 4410-4412: update applications 2021-12-24 16:33:20 +08:00
occheung 534ef5c6ed 4410-4412: fix layout 2021-12-22 17:19:27 +08:00
occheung bc4e11cdf6 4410-4412: separate RAM SYNC example 2021-12-22 17:17:03 +08:00
occheung 9251da4ce0 4410-4412/RAM: add amplitude ramp example 2021-12-22 17:16:21 +08:00
occheung 4b3f0c5612 4410-4412/RAM: replace screenshot with plot 2021-12-22 17:14:57 +08:00
occheung 1ce032605a 4410-4412/RAM: lower background frequency to 5MHz 
It is to make the plot easier for our eyes.
 2021-12-22 17:12:48 +08:00
occheung d26fe0f5d5 4410-4412: configure_ram_mode add slack 
When the RAM data is larger, extra slack is needed to avoid underflow.
 2021-12-22 17:10:57 +08:00
occheung 9b40af6c6a 4410-4412: add graphs for phase noise/harmonic contents 2021-12-22 12:17:23 +08:00
occheung 82521ff909 4410-4412: enlarge photo 
And prevent the photo from jumping to the next page.
 2021-12-22 09:53:06 +08:00
occheung b538ef7858 4410-4412: add unit when calling set_att() 2021-12-08 12:19:31 +08:00
occheung 2127697fe6 4410-4412: update set() parameters 
Note that the `frequency` param is mandatory in AD9912.set(), while optional in AD9910.set()
 2021-12-08 12:17:27 +08:00
occheung aa96ed4ab3 4410: fix whitespace in ram example 2021-12-07 16:35:03 +08:00
occheung 60861ccf1f 4410: mention default profile for single-tone 2021-12-07 16:29:35 +08:00
occheung 8f1a437378 4410: add ram modulation with synchronization example 2021-12-07 16:26:25 +08:00
occheung 011d63f3eb 4410: modify ram example 
* Use `prepare()` to init the arrays, would be great if the value can be prepared there. However, the type check was not happy about it.
* Separate RAM configuration into a separate function
* Separate DDS init, digital attenuation & switch config in an init function
* Use `dds.set()`. It is supposed to look simple.

All these are to avoid repeating the long code in the coming RAM+SYNC example.
 2021-12-07 16:21:56 +08:00
occheung 0dbf7a70c4 4410: add phase param to single-tone sync e.g. 
+- 0.25 turns w.r.t the other channel, excluding I/O update mismatch
 2021-12-07 16:20:18 +08:00
occheung 7265d05bae 4410-4412: remove leftover comment 2021-12-07 16:19:05 +08:00
occheung b657e0fea5 4410-4412: clarify nominal power 
The same figure can be found in sinara issue 354 / urukul issue 3, and it was meant to be an empirical limit for low frequency RF outputs.
 2021-12-06 13:17:19 +08:00
occheung ca896ed094 4410-4412: fix phase noise layout, add harmonics 2021-12-06 13:06:24 +08:00
occheung e109ec2b6f 4410-4412: fix performance data condition 
The condition should now align with wiki and sinara issue 354 / urukul issue 3.
 2021-12-06 13:05:46 +08:00