Commit Graph

17 Commits

Author SHA1 Message Date
Jack-Zheng 9c10edde19 CurrentSensor: add mid point voltage reference; FPGA: fix pinout 2021-06-18 14:24:15 +08:00
Jack-Zheng 0cebd6ed2b LVDS: add LVDS ports; all: add LEDs 2021-06-18 11:30:16 +08:00
Jack-Zheng 74f4fc201a FPGA: add GPIO and ADC parallel port 2021-06-18 10:27:05 +08:00
Jack-Zheng 9a62476f9e MCU: finish connectors 2021-06-17 17:33:12 +08:00
Jack-Zheng 4123caa996 all: add gitignore; remove redundant files from repo; optimize file name style 2021-06-17 15:49:24 +08:00
Jack-Zheng 6cee2d0419 Current_Senser: add current sampling; all: optimize +3.3VA 2021-06-17 15:30:51 +08:00
Jack-Zheng 9f7ffb7754 docs: remove unused Chinese docs 2021-06-17 11:12:40 +08:00
Jack-Zheng dfe4255a21 MCU: finish FSMC, PWM 2021-06-17 10:52:33 +08:00
Jack-Zheng fc8c667020 Power: fix hierarchical and global label 2021-06-16 17:32:33 +08:00
Jack-Zheng 5b4801ff74 FPGA: finish EEM, I2C, CFG, SPI FLASH 2021-06-16 17:32:33 +08:00
Jack-Zheng fc2cb47610 all: map symbol and footpins 2021-06-16 17:32:33 +08:00
Jack-Zheng 24471104a5 Analog_LVDS: finish ADC 2021-06-16 17:32:33 +08:00
Jack-Zheng 66188cd3ad Ethernet: finish ethernet controller and PoE input 2021-06-16 17:32:33 +08:00
Jack-Zheng e28d01d115 PowerSupply: finish power supply part: 12V --(DCDC)--> 6.5V --(LDO)--> 5V+3.3V+2.5V+1.2V 2021-06-16 17:32:33 +08:00
Jack-Zheng 83bc618f77 PowerSupply: finish PoE and 12V input schematic 2021-06-16 17:32:32 +08:00
Jack-Zheng 232af06c28 components confirmed; datasheet collected; framework finished 2021-06-16 17:32:32 +08:00
Jack-Zheng da19dad9cd init project 2021-06-16 17:31:36 +08:00