sb10q
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  • Joined on 2019-03-28
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sb10q commented on issue M-Labs/nac3#101 2024-11-16 12:05:02 +08:00
pass return value of kernels to host

Relevant tests also need to be re-enabled.

sb10q reopened issue M-Labs/nac3#101 2024-11-16 12:04:40 +08:00
pass return value of kernels to host
sb10q commented on issue M-Labs/nac3#101 2024-11-16 12:04:40 +08:00
pass return value of kernels to host

M-Labs/nac3#552 (comment)

sb10q commented on pull request M-Labs/nac3#552 2024-11-16 12:04:26 +08:00
Pass kernel return alongside attributes writeback

after adjusting service 0 handling in ARTIQ.

Can you send a PR for that? Is it forward/backward compatible?

sb10q pushed to master at M-Labs/nac3 2024-11-16 12:04:06 +08:00
b53266e9e6 artiq: use async RPC for attributes writeback
86eb22bbf3 artiq: main is always the last module
beaa38047d artiq: suppress main module debug warning
705dc4ff1c artiq: lump return value into attributes writeback RPC
Compare 4 commits »
sb10q closed issue M-Labs/nac3#101 2024-11-16 12:04:06 +08:00
pass return value of kernels to host
sb10q merged pull request M-Labs/nac3#552 2024-11-16 12:04:05 +08:00
Pass kernel return alongside attributes writeback
sb10q commented on pull request M-Labs/artiq-extrapkg#26 2024-11-16 11:57:19 +08:00
Switch stable artiq to python3.12 to fix the packaging issues

As I told you countless times, commits need to be split by function. Pay attention to how I had done the same thing on the master branch.

sb10q pushed to master at M-Labs/web2019 2024-11-16 11:55:41 +08:00
a5a8589b28 add link to OffsetStabilizer
sb10q opened issue sinara-hw/datasheets#67 2024-11-16 10:52:02 +08:00
highlight limitations of isolated TTL cards
sb10q commented on issue M-Labs/it-infra#34 2024-11-16 10:51:09 +08:00
GRE tunnels break after nixos-rebuild switch

This isn't very surprising considering that you failed to provide an explanation for why udevadm trigger is required.

sb10q commented on issue M-Labs/it-infra#34 2024-11-16 10:48:09 +08:00
GRE tunnels break after nixos-rebuild switch

Your fix doesn't even work or isn't complete.

reloading the following units: dbus.service, firewall.service, reload-systemd-vconsole-setup.service
restarting the following units: dhcpcd.serv…
sb10q merged pull request sinara-hw/datasheets#65 2024-11-16 10:44:25 +08:00
Urukul/Mirny: spellchecks, style
sb10q pushed to master at sinara-hw/datasheets 2024-11-16 10:44:25 +08:00
49c06af717 4410-4412: replace dead link
bebd7bbfda 4456: spellcheck, style
a68d5f50d0 4410-4412: spellcheck, style
Compare 3 commits »
sb10q pushed to master at sinara-hw/datasheets 2024-11-16 10:43:48 +08:00
480e8b2966 preamble: codesection add heading
b9b103b38e 2118-2128, 2245: fixes
a0a1f4056e 2245: spellcheck, style
b3358e9b93 2238: spellcheck, style
5acedc8f40 2118-2128: spellcheck, style
Compare 6 commits »
sb10q merged pull request sinara-hw/datasheets#64 2024-11-16 10:43:47 +08:00
TTLs: spellchecks, style
sb10q pushed to master at sinara-hw/datasheets 2024-11-16 10:43:18 +08:00
4bc2d4ee6d 5568: spellcheck, style
0a802d29d8 5518-5528: spellcheck, style
Compare 2 commits »
sb10q merged pull request sinara-hw/datasheets#66 2024-11-16 10:43:17 +08:00
IDC Adapters: spellchecks, style
sb10q merged pull request M-Labs/artiq-zynq#335 2024-11-16 10:40:49 +08:00
gateware: Add default TTLs to EBAZ4205
sb10q pushed to master at M-Labs/artiq-zynq 2024-11-16 10:40:48 +08:00
d79bf8d54a gateware: Add default TTLs to EBAZ4205 (#335)