 occheung
|
514b649bfc
|
receiver: allow triggered alignment
|
2023-05-10 00:22:40 +08:00 |
|
occheung
|
8bfd229bbe
|
observe bit error
|
2023-04-26 08:03:47 +08:00 |
|
occheung
|
950d9ee8be
|
include efc
|
2023-04-26 05:08:33 +08:00 |
|
occheung
|
ce1f669138
|
handle group delay
|
2023-04-25 12:17:17 +08:00 |
|
occheung
|
f55b2593a1
|
impl multi serdes tx/rx
|
2023-04-25 09:41:04 +08:00 |
|
occheung
|
24e8e9add9
|
init multi loopback
|
2023-04-25 07:59:04 +08:00 |
|
occheung
|
7035082d7f
|
add group delay pulses
|
2023-04-24 09:17:48 +08:00 |
|
occheung
|
b73777b39f
|
load optimal delay tap
|
2023-04-24 07:41:58 +08:00 |
|
occheung
|
e6902d1da5
|
adjust register-wide bitslip right after slave bitslip
|
2023-04-24 07:10:18 +08:00 |
|
occheung
|
e2a8433f83
|
align master/slave pair
|
2023-04-24 03:55:01 +08:00 |
|
occheung
|
7f23de0ce8
|
init
|
2023-04-23 11:42:18 +08:00 |