David Nadlinger
0279a60a55
examples: Add README
...
This will be displayed by GitHub below the directory listing, and was
inspired by observing new users disregard the examples/ tree entirely
(even though the experiments and device DBs within would have cleared
up their getting-started confusion) due to the perceived complexity
wall induced by the wealth of subdirectories.
2019-12-17 13:35:19 +00:00
5fefdcc324
manual: clarify XY applet setup example
2019-12-15 10:41:58 +08:00
8d13aeb96c
test: run test_help for browser and dashboard
2019-12-12 10:34:58 +08:00
ac09f3a5da
artiq_browser: fix command line argument handling. Closes #1404
2019-12-11 16:18:56 +08:00
52112d54f9
kasli_generic: expose peripheral_processors dictionary. Closes #1403
2019-12-10 10:30:06 +08:00
6f52540569
wrpll: fix previous commit
2019-12-09 20:13:55 +08:00
13486f3acf
wrpll: swap helper/main si549 frequencies
2019-12-09 19:49:34 +08:00
150a02117c
sayma_rtm: drive clk_src_ext_sel
2019-12-09 19:47:50 +08:00
307a6ca140
gth_ultrascale: make OBUFDS_GTE3 work
...
https://www.xilinx.com/support/answers/67919.html
2019-12-09 18:13:22 +08:00
f7a5df8d81
wrpll: add diagram from Weida
2019-12-09 17:41:44 +08:00
4919fb8765
wrpll: print DDMTD helper tags
2019-12-09 17:39:22 +08:00
0d4eccc1a5
wrpll: improve debug output
2019-12-09 17:23:09 +08:00
f633c62e8d
wrpll: speed up si549 i2c access
2019-12-09 17:22:58 +08:00
14e09582b6
wrpll: work around si549 not working when lsdiv=2
2019-12-09 16:20:08 +08:00
439576f59d
wrpll: fix Si549 initialization delays
2019-12-09 16:13:57 +08:00
2b5213b013
wrpll: constrain clocks
2019-12-09 12:26:44 +08:00
05e2e1899a
wrpll: update OBUFDS_GTE2 comment
...
Seems O can fan out simultaneously to transceiver and fabric.
Kasli is using ODIV2 for no particular reason.
2019-12-09 11:58:54 +08:00
4148efd2ee
wrpll: implement filters and connect to Si549
2019-12-09 11:47:29 +08:00
d43fe644f0
wrpll: stabilize DDMTDSamplerGTP
2019-12-09 11:47:14 +08:00
0499f83580
wrpll: helper clock sanity check
2019-12-08 23:46:33 +08:00
46a776d06e
sayma: introduce WRPLL on RTM
2019-12-08 15:30:00 +08:00
f35f658bc5
artiq_flash: rework RTM management
2019-12-08 15:29:31 +08:00
bcd061f141
artiq_flash: RTM is a regular DRTIO satellite, can be used with all variants
2019-12-08 15:12:04 +08:00
883310d83e
sayma_rtm: si5324 -> cdrclkc
2019-12-08 14:26:05 +08:00
57a5bea43a
sayma_rtm: support setting RTIO frequency
2019-12-08 11:45:31 +08:00
da9237de53
wrpll: support differential DDMTD inputs
2019-12-07 18:18:57 +08:00
Paweł Kulik
3851a02a3a
Added option of flashing only RTM gateware.
...
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2019-12-07 09:31:19 +08:00
Paweł Kulik
14e250c78f
Enabled internal pullup for CML SYSREF outputs, otherwise there is no signal on them.
...
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2019-12-07 09:30:24 +08:00
7098854b0f
wrpll: share DDMTD counter
2019-12-04 19:05:56 +08:00
05c5fed07d
suservo: stray comma
2019-12-03 08:38:07 +00:00
56074cfffa
suservo: support operating with one urukul
...
implemented by wiring up the second Urukul to dummy pins
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-12-02 11:30:20 +01:00
86e1924493
kasli_generic: support external reference on masters
2019-11-30 07:34:41 +00:00
eb271f383b
wrpll: add DDMTD cores
2019-11-28 22:03:50 +08:00
39d5ca11f4
si549: increase I2C frequency
2019-11-28 22:03:26 +08:00
87894102e5
si549: use recommended i2c read sequence
2019-11-28 17:49:02 +08:00
2e55e39ac7
wrpll: use spaces to indent
2019-11-28 17:40:25 +08:00
354d82cfe3
wrpll: drive helper clock domain
2019-11-28 17:40:00 +08:00
4a03ca928d
artiq_flash: sayma fixes
2019-11-28 17:38:29 +08:00
68cab5be8c
si549: cleanups
2019-11-28 16:36:59 +08:00
bcd2383c9d
wrpll: si549 initialization
2019-11-27 22:58:08 +08:00
4832bfb08c
wrpll: i2c functions, select_recovered_clock placeholder
2019-11-27 21:21:00 +08:00
449d2c4f08
libboard_misoc: fix !has_i2c
2019-11-27 21:04:28 +08:00
e0687b77f5
si5324: 10 MHz ext_ref_frequency
...
* close #1254
* tested on innsbruck2 kasli variant
* sponsored by Uni Innsbruck/AQT
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-11-22 18:29:12 +01:00
c536f6c4df
sayma_amc: output ddmtd_rec_clk
2019-11-20 19:16:04 +08:00
ae50da09c4
drtio/gth_ultrascale: support OBUFDS_GTE3
2019-11-20 19:15:50 +08:00
fe0c324b38
sayma: integrate si549 core
2019-11-20 17:37:16 +08:00
fa41c946ea
wrpll: si549 fixes
2019-11-20 17:04:24 +08:00
c5dbab1929
gateware: move wrpll to drtio
2019-11-20 14:43:08 +08:00
gthickman
56d4b70e01
ad9910 osk ( #1387 )
...
* updated adoo10.py for RAM mode frequency control
* updated docstrings for set_cfr1() in ad9910.py
* fixed typo in ad9910.py
* added docstrings to ad9910.py
* removed OSK-related changes in AD9910, to be included in a separate branch.
* updated AD9910 set_cfr1 for control of OSK mode parameters
* updated AD9910 set_cfr1() for control of OSK mode parameters.
2019-11-18 15:57:26 +01:00
Fabian Schmid
f73e2a3d30
doc: clarify urukul attenuator behavior
...
Closes #1386
Signed-off-by: Fabian Schmid <fabian.schmid@mpq.mpg.de>
2019-11-18 15:56:00 +01:00
