David Nadlinger
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720838a23e
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gateware/suservo: Avoid magic number for activation delay width
Mostly for documentation purposes; 8 bits ought to be enough for
everyone.
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2019-06-14 23:45:40 +01:00 |
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hartytp
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cfe1f56f73
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suservo: add some more comments to the RTServoMem to clarify the RTIO interface (#1323)
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2019-05-17 16:12:35 +01:00 |
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hartytp
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c55460f59f
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suservo: fix doc typo
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2018-09-03 11:48:40 +02:00 |
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9b5a46dffd
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suservo: fix restart counter assertion
c.f. #788
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2018-05-31 15:56:11 +00:00 |
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504d37b66b
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suservo: add SI units functions and document
m-labs/artiq#788
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2018-05-14 12:26:49 +00:00 |
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d71e4e60a9
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suservo: use addition for offset
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2018-05-14 12:26:49 +00:00 |
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2a47b934ea
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suservo: remove adc return clock gating
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2018-05-14 12:26:49 +00:00 |
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74c0b4452b
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suservo: clkout and sdo[b-d] are inverted
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2018-05-14 12:26:49 +00:00 |
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04240cdc08
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suservo: sampler channels are reversed
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2018-05-14 12:25:09 +00:00 |
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f055bf88f6
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suservo: add clip flags (#992)
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2018-05-09 07:16:15 +00:00 |
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5f00326c65
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suservo: coeff mem write port READ_FIRST
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2018-04-27 15:43:32 +00:00 |
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307cd07b9d
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suservo: lots of gateware/ runtime changes
tested/validated:
* servo enable/disable
* dds interface, timing, io_update, mask_nu
* channel control (en_out, en_iir, profile)
* profile configuration (coefficients, delays, offsets, channel)
* adc timings and waveforms measured
* asf state readback
* adc readback
individual changes below:
suservo: correct rtio readback
suservo: example, device_db [wip]
suservo: change rtio channel layout
suservo: mem ports in rio domain
suservo: sck clocked from rio_phy
suservo: cleanup, straighten out timing
suservo: dds cs polarity
suservo: simplify pipeline
suservo: drop unused eem names
suservo: decouple adc SR from IIR
suservo: expand coredevice layer
suservo: start the correct stage
suservo: actually load ctrl
suservo: refactor/tweak adc timing
suservo: implement cpld and dds init
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2018-04-27 13:50:26 +02:00 |
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105068ad90
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suservo: fix restart timing
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2018-04-25 15:19:49 +00:00 |
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c304b6207a
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suservo: drop adc idelays
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2018-04-25 14:59:50 +00:00 |
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b44d6517d1
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suservo: use 125 MHz SDR ADC
* easier timing
* natural sampling on rising edge
* timing, signal robustness
* adjust the servo iteration timing
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2018-04-25 14:32:23 +00:00 |
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37c186a0fc
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suservo: refactor, constrain
* remove DiffMixin, move pad layout handling to pads
* add input delay constraints, IDELAYs
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2018-04-25 13:44:52 +00:00 |
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f74998a5e0
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suservo: move arch logic to top, fix tests
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2018-04-23 21:11:26 +00:00 |
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4903eb074c
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suservo: use BUFIO/BUFH for ADC
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2018-04-23 18:30:19 +00:00 |
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e36deab0a8
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suservo/adc: try to help vivado extract srls
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2018-04-23 18:30:19 +00:00 |
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4c1e356f67
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suservo: add pads rewiring layer for eems
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2018-04-23 18:30:18 +00:00 |
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d5eea962ec
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suservo: fix cnv_b diff
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2018-04-23 18:30:12 +00:00 |
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934c41b90a
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gateware: add suservo
from
fe4b60b902
m-labs/artiq#788
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2018-04-23 18:24:59 +00:00 |
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