d20fb5abb2
remove workaround
2015-07-07 13:46:14 +02:00
959ba99f1c
pipistrello: try simpler constraints
2015-07-04 21:08:28 -06:00
753d61b38f
complete support for TTL clock generator
2015-07-04 18:36:01 +02:00
0a9f9093f7
kc705: fix ttl15
2015-07-02 20:02:05 +02:00
2881d5f00a
gateware: add RTIO clock generator
2015-07-02 18:20:26 +02:00
3ee2bd5fa8
pipistrello: set CLKFX_MD_MAX from MD ratio
2015-06-29 12:59:59 -06:00
d1c4cf0b78
pipistrello: update rtio channel doc
2015-06-29 12:21:54 -06:00
f0ac8cb354
pipistrello: add user_led:2 for debugging w/o adapter
2015-06-29 11:30:37 -06:00
d39382eca0
pipistrello: ext_led fifo depth 4
2015-06-28 22:06:33 -06:00
165ef20ffa
pipistrello: drop rtio fifos for invisible leds
...
the main board leds are all under the adapter board
also tweak fifo depths a bit in a feeble attempt to circumvent a ISE hang (par
phase 4)
2015-06-28 21:24:57 -06:00
e2cb0e107f
pipistrello: really do not request xtrig
2015-06-28 21:11:41 -06:00
23eee94458
pipistrello: add notes to nist_qc1 about dds_clock
...
* remove xtrig from the target as it is not usually connected (used for
dds_clock) and ignore PMT2/BTN2 as C:15 is used for dds_clock.
* this also aligns the ttl channel numbers with kc705/nist_qc1 (two pmt
inputs followed by 16 ttl outputs followed by leds)
2015-06-28 20:56:12 -06:00
944bfafefa
soc: support QC2 and AD9914 (untested)
2015-06-28 21:37:27 +02:00
b6310b72db
runtime: fix log formatting
2015-06-28 17:29:52 +02:00
8b5b219a18
runtime: provide fixdfdi
2015-06-27 23:51:48 +02:00
3bd7f11737
update lwip
2015-06-27 22:48:41 +02:00
2d475e146b
runtime/flash_storage: use log not printf
2015-06-27 22:47:36 +02:00
a7bbcdc1ad
targets/pipistrello: mon -> moninj
2015-06-27 21:15:17 +02:00
5b3eac1d96
pipistrello: tweak fifo depths a bit
...
ise being dull again, inferring all but one 64x64 fifo as bram...
minimum bram depth is 256 anyway
2015-06-22 23:25:07 -06:00
cd249b2f66
pipistrello: run at 83+1/3 MHz, cleanup CRG
2015-06-22 19:03:00 -06:00
9f3f9255a2
soc: increase DDS output FIFO sizes
2015-06-21 08:40:10 -06:00
87ea1433d3
dds: all working
2015-06-20 18:42:39 -06:00
5a9bdb2e33
DDS monitoring
2015-06-19 15:30:17 -06:00
03fe71228b
dds: phase computation fixes
2015-06-19 11:01:43 -06:00
3636025e69
pipistrello: smaller L2 cache
2015-06-18 09:49:52 -06:00
Florent Kermarrec
449964cce8
runtime/mailbox: remove flush of L2 cache (L2 cache is now shared between CPUs)
2015-06-18 12:18:45 +02:00
Florent Kermarrec
38a0f63bd2
gateware/soc: use Minicon SDRAM controller and 128KB shared L2 cache
2015-06-18 12:18:03 +02:00
b2af0f6cc3
soc,runtime: support TTL override
2015-06-09 19:51:02 +08:00
37c7ea31c3
gui: TTL override support
2015-06-06 00:03:30 +08:00
a2ae5e4706
runtime: report TTL status over UDP
2015-06-03 18:26:19 +08:00
59b339462c
Merge branch 'master' of github.com:m-labs/artiq
2015-06-02 17:45:16 +08:00
b81151eb42
soc: rtio monitor
2015-06-02 17:41:40 +08:00
Yann Sionneau
ed95038681
flash_storage: remove useless parentheses
2015-05-29 11:11:29 +02:00
Yann Sionneau
575dfade38
flash_storage comm: use OK/ERROR replies instead of specific FLASH_WRITE_REPLY
2015-05-29 11:10:40 +02:00
Yann Sionneau
c32133b815
flash_storage: avoid crash if a record size gets corrupted to be less than 6
2015-05-27 12:56:21 +02:00
Yann Sionneau
4bf7875b87
flash_storage: refactor + unit tests + artiq_coreconfig.py CLI + doc
2015-05-27 18:06:12 +08:00
6c35d066fc
runtime: add missing include
2015-05-21 12:00:48 +08:00
0ca42dbdbe
runtime/dds: send one FUD per command in a batch, compensate POW
2015-05-09 17:26:36 +08:00
ce4b5739ed
runtime: reset all DDSes upon startup
2015-05-09 17:12:38 +08:00
b22b8b661b
runtime: fix rtio channel selection in dds batch
2015-05-08 22:09:08 +08:00
55f2fef576
runtime: support DDS batches
2015-05-08 16:51:54 +08:00
53c6339307
runtime: break ttl-specific functions from rtio
2015-05-08 16:20:12 +08:00
a36c51eb83
DDS over RTIO (batch mode not supported yet)
2015-05-08 14:44:39 +08:00
a91bb48ced
gateware: adapt to misoc changes
2015-05-06 18:02:15 +08:00
4048568d8e
support kernel handover with coherent time
2015-05-02 23:41:49 +08:00
d8fdac6f86
runtime/bridge: factor rtio_init
2015-05-02 12:27:15 +08:00
050db0b0f5
runtime: support platforms without flash
2015-05-02 12:20:20 +08:00
8fe5c7ac01
runtime/test_mode: support setting O and OE separately
2015-05-02 12:16:09 +08:00
a61d701d47
rtio: decouple PHY reset from logic reset
2015-05-02 11:47:11 +08:00
62669f9ff2
soc: factor timer, kernel CPU and mailbox
2015-05-01 18:51:24 +08:00
