64347290fb
comm_kernel: fix off-by-one error for numeric value range check
2022-01-11 17:17:57 +08:00
f49f1fcbfc
sayma_amc: add option to generate a 9MHz sq wave on the MCXs
2021-12-21 18:43:36 +08:00
86fcd97416
sayma_amc: add option to force outputs on the MCXs
2021-12-21 18:43:36 +08:00
759f00416b
llvm_ir: move stacksave before lltag alloca in build_rpc
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Signed-off-by: Steve Fan <sf@m-labs.hk>
2021-12-19 12:09:19 +08:00
5818bc0878
mmcspi: fix timeout on detecting CS_n
2021-12-18 11:31:58 +08:00
44171258f5
mmcspi: add timeout on detecting edges & data
2021-12-18 00:33:00 +08:00
bc249c32df
sayma: fallback default MAC address if MMCSPI fails
2021-12-17 19:20:34 +08:00
949917cc9c
jdcg: fix missing JESD reset & JDAC re-init
2021-12-17 19:12:42 +08:00
dc411d55be
jdcg: allow <=2 retries upon SYSREF test failure
2021-12-17 19:12:42 +08:00
40e7b6058e
sayma: support reading EUI48 from MMCSPI
2021-12-16 21:23:29 +08:00
105af644bd
libboard_misoc: add MMCSPI bitbanging driver
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* Requires changes to Sayma AMC openMMC firmware as in https://github.com/HarryMakes/openMMC/commits/sayma-devel-fix/eui
* Primary supports reading EUI48 broadcasted from the MMC
2021-12-16 21:23:29 +08:00
04ee775a9f
sayma_amc: adopt MMCSPI bitbanging GPIO core
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* Requires changes to migen as in https://github.com/HarryMakes/migen/commits/sayma-mmcspi
2021-12-16 21:23:29 +08:00
9547a15162
Merge pull request #1796 from HarryMakes/release-6
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Metlino/Sayma: fix DDS sync & upgrade SAWG to 1 GS/s
2021-12-13 10:58:49 +08:00
d3869c966e
examples: fix RTIO clocks to 125 MHz
2021-12-13 10:42:23 +08:00
77c4d2f013
siphaser: remove support for 150 MHz RTIO clock
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* Sayma AMC no longer uses 150 MHz RTIO clock after 1 GS/s upgrade.
2021-12-13 10:37:50 +08:00
23f5796d67
sayma: fix FTW for SyncDDS
2021-12-10 12:13:09 +08:00
34e89a3777
gth_ultrascale: fix TX/RX_CLK25_DIV for 125 MHz GTREFCLK0
2021-12-10 12:13:06 +08:00
a14666bc15
ad9154: re-adjust LMFCDel & LMFCVar for 1 GS/s (K=32)
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* @HarryMakes performed 25 consecutive power-cycles of Sayma, in 2-min intervals:
* Results: MinDelay = 8, FALL_COUNT_Delay = 10
2021-12-10 12:13:03 +08:00
2f49a1a412
sayma: 600 MS/s -> 1 GS/s
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* Merged from 'sayma1g' (d74cd24d
2021-12-10 12:12:43 +08:00
412936f8db
ad9154: adjust LMFCDel & LMFCVar based on DYN_LINK_LATENCY readbacks
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* @HarryMakes performed 25 consecutive power-cycles of Sayma, in 2-min intervals:
* Results: MinDelay = 6, FALL_COUNT_Delay = 8 (w/ rollover)
2021-12-10 12:09:58 +08:00
51e28de2f6
ad9154: check alignment phase error after one-shot sync
2021-12-10 12:09:58 +08:00
f5b9eab84b
ad9154: fix sync
2021-12-10 12:09:58 +08:00
9dfb0bfe1b
gth_ultrascale: fix missing T/RXPROGDIVRESET
2021-12-10 12:09:58 +08:00
946254d22e
artiq_sinara_tester: fix handling of IO_UPDATE with SU-Servo
2021-11-20 16:53:09 +08:00
d9b01ed81a
compiler: stop using sys.version_info for parser
2021-08-12 12:53:21 +08:00
9801aeb6a5
setup.py: remove outdated dependency_links
2021-08-12 12:53:16 +08:00
08b09f6dc3
artiq_run: fix multiarch
2021-08-12 12:48:23 +08:00
dda4121c1d
compiler: turn __repr__ into __str__ when sphinx is used. Closes #741
2021-08-05 11:52:41 +08:00
19daf91280
doc: nixpkgs 21.05
2021-07-27 09:32:35 +08:00
281b2182da
artiq_flash: cleanup openocd handling, do not follow symlinks
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Not following symlinks allows files to be added to OpenOCD via nixpkgs buildEnv.
2021-07-27 09:31:51 +08:00
414080554c
moninj: fix read of incomplete data ( #1729 )
2021-07-22 17:57:45 +08:00
7b523084b7
documentation: correct artiq_coremgmt examples
2021-07-19 12:10:32 +08:00
c4902be6f8
doc: document shell-dev shortcut
2021-07-14 08:32:48 +08:00
c6cd9ac2ea
sinara_tester: add delay before adf5356 init
2021-07-07 12:35:53 +08:00
9741e4aa43
compiler: stop using deprecated numpy.float
2021-06-25 18:35:30 +08:00
Leon Riesebos
ae137d1c9e
artiq_flash: wrap paramiko commands in bash login shell
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the login shell will load the nix environment on non-nixos systems
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-06-25 11:28:26 +08:00
Star Chen
2f808880d5
Kasli: Added front panel user LED ( #1623 ) ( #1694 )
2021-06-07 16:32:03 +08:00
9033c59b75
aqctl_corelog: fix endianness issue ( closes #1682 ) ( #1689 )
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Fixed according to
https://forum.m-labs.hk/d/190-fetchingreading-the-core-log-in-a-central-location/10
Tested with both KC705 and ZC706.
2021-06-03 14:06:52 +08:00
a80c35a606
artiq_ddb_template: kasli-soc support
2021-05-30 20:34:16 +08:00
93e1bd9ba0
coredevice.comm_kernel: improved byte list performance.
2021-05-28 11:28:57 +08:00
David Nadlinger
65f0951f1a
manual/compiler: Mention TArray annotation
2021-05-25 10:11:16 +08:00
040aa6fd9d
artiq_flash: improve openocd not found error message
2021-05-13 14:45:43 +08:00
a16c81a069
phaser: typo
2021-05-07 10:00:24 +08:00
Peter Drmota
ec4270fb4b
coredevice.comm_kernel: Fix unpacking of lists of numpy.int64
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test.coredevice.test_embedding: Add tests for list of numpy.int64
2021-04-24 16:43:25 +08:00
Leon Riesebos
2d4fefe42e
added DefaultMissing to __all__
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Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-04-21 11:44:19 +08:00
Leon Riesebos
1619a32a1e
ad99xx added additional kernel invariants
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Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-04-21 11:19:20 +08:00
Leon Riesebos
d000e06fbc
ad99xx make kernel invariants instance variable
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prevents mutations on class variable that applies to all instances at once
closes #1654
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-04-21 11:19:20 +08:00
95e292c8a2
fastino: ensure xxx_to_mu() methods return int32 on the host
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Currently running `voltage_to_mu()` or `voltage_group_to_mu()` on the host will
convert all machine unit values to int64. This leads to issues when machine units
are returned from RPCs.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-04-19 16:50:27 +08:00
0e3f23a86a
jsonschema: mirny: fix clk_sel default value
2021-03-30 16:07:26 +08:00
dbeea7605b
jsonschema: style
2021-03-30 14:35:01 +08:00
