forked from M-Labs/artiq
jdcg: allow <=2 retries upon SYSREF test failure
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@ -9,6 +9,7 @@ pub const SYNC: u8 = 0x12;
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pub const DDMTD_SYSREF_RAW: u8 = 0x20;
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pub const DDMTD_SYSREF: u8 = 0x21;
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pub const DDMTD_INIT: u8 = 0x22;
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fn average_2phases(a: i32, b: i32, modulo: i32) -> i32 {
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@ -410,9 +410,21 @@ pub mod jesd204sync {
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}
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pub fn sysref_auto_rtio_align() -> Result<(), &'static str> {
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test_ddmtd_stability(true, 4)?;
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test_ddmtd_stability(false, 1)?;
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test_slip_ddmtd()?;
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for i in 0..3 { // Allow resetting DDMTD core 2 times at max
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let result = {
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test_ddmtd_stability(true, 4)?;
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test_ddmtd_stability(false, 1)?;
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test_slip_ddmtd()
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};
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if let Err(_) = result {
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if i == 3 {
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error!("SYSREF test failed with too many retries");
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return result
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}
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warn!("SYSREF test failed, retrying...");
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jdac::basic_request(0, jdac_common::DDMTD_INIT, 0)?;
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} else { break }
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}
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info!("determining SYSREF S/H limits...");
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let sysref_sh_limits = measure_sysref_sh_limits()?;
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@ -320,7 +320,8 @@ fn process_aux_packet(_repeaters: &mut [repeater::Repeater],
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},
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jdac_common::DDMTD_SYSREF_RAW => (true, jdac_common::measure_ddmdt_phase_raw() as u8),
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jdac_common::DDMTD_SYSREF => (true, jdac_common::measure_ddmdt_phase() as u8),
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_ => (false, 0)
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jdac_common::DDMTD_INIT => (init_ddmtd_reset_ad9154().is_ok(), 0),
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_ => (false, 0),
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}
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};
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#[cfg(not(has_ad9154))]
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@ -415,6 +416,15 @@ fn hardware_tick(ts: &mut u64) {
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}
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}
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#[cfg(has_ad9154)]
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fn init_ddmtd_reset_ad9154() -> Result<(), &'static str> {
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jdac_common::init_ddmtd()?;
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for dacno in 0..csr::CONFIG_AD9154_COUNT {
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board_artiq::ad9154::reset_and_detect(dacno as u8)?;
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}
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Ok(())
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}
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#[cfg(all(has_si5324, rtio_frequency = "125.0"))]
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const SI5324_SETTINGS: si5324::FrequencySettings
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= si5324::FrequencySettings {
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