forked from M-Labs/artiq
1
0
Fork 0
Commit Graph

37 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 0a9f9093f7 kc705: fix ttl15 2015-07-02 20:02:05 +02:00
Sebastien Bourdeauducq 2881d5f00a gateware: add RTIO clock generator 2015-07-02 18:20:26 +02:00
Sebastien Bourdeauducq 944bfafefa soc: support QC2 and AD9914 (untested) 2015-06-28 21:37:27 +02:00
Sebastien Bourdeauducq 9f3f9255a2 soc: increase DDS output FIFO sizes 2015-06-21 08:40:10 -06:00
Sebastien Bourdeauducq 5a9bdb2e33 DDS monitoring 2015-06-19 15:30:17 -06:00
Sebastien Bourdeauducq 03fe71228b dds: phase computation fixes 2015-06-19 11:01:43 -06:00
Florent Kermarrec 38a0f63bd2 gateware/soc: use Minicon SDRAM controller and 128KB shared L2 cache 2015-06-18 12:18:03 +02:00
Sebastien Bourdeauducq b2af0f6cc3 soc,runtime: support TTL override 2015-06-09 19:51:02 +08:00
Sebastien Bourdeauducq a2ae5e4706 runtime: report TTL status over UDP 2015-06-03 18:26:19 +08:00
Sebastien Bourdeauducq b81151eb42 soc: rtio monitor 2015-06-02 17:41:40 +08:00
Sebastien Bourdeauducq a36c51eb83 DDS over RTIO (batch mode not supported yet) 2015-05-08 14:44:39 +08:00
Sebastien Bourdeauducq a91bb48ced gateware: adapt to misoc changes 2015-05-06 18:02:15 +08:00
Sebastien Bourdeauducq a61d701d47 rtio: decouple PHY reset from logic reset 2015-05-02 11:47:11 +08:00
Sebastien Bourdeauducq 62669f9ff2 soc: factor timer, kernel CPU and mailbox 2015-05-01 18:51:24 +08:00
Sebastien Bourdeauducq 967145f2dc watchdog support on core device (broken by bug similar to issue #19) 2015-04-29 12:58:37 +08:00
Sebastien Bourdeauducq 86c012924e targets: rename AMP->Top, merge peripherals 2015-04-28 00:18:54 +08:00
Sebastien Bourdeauducq 938e1c2842 Remove UP support.
The only advantage of UP is to support the Papilio Pro, but that port is also very limited in other ways and the Pipistrello provides a more reasonable platform that also supports AMP.

On the other hand, RPCs on UP are difficult to implement with the session.c protocol system (without an operating system or coroutines), along with many other minor difficulties and maintainance issues. Planned features such as watchdogs in the core device are also difficult on UP.
2015-04-27 20:43:45 +08:00
Sebastien Bourdeauducq 546996f896 coredevice,runtime: put ref_period into the ddb 2015-04-16 15:15:38 +08:00
Florent Kermarrec fd2def4951 generate MAILBOX_BASE with SoC and use it in runtime
to avoid possible future mismatches between SoC/runtime, constants that can be easily generated from SoC should be defined this way.
2015-04-15 20:40:28 +08:00
Sebastien Bourdeauducq 4c10182c9f rtio: refactor, use rtlink 2015-04-14 19:44:45 +08:00
Sebastien Bourdeauducq 601f593ac4 targets/kc705: do not depend on particular Migen generated signal names 2015-04-11 21:46:57 +08:00
Florent Kermarrec bdd02a064e targets/artiq_kc705: add false path between rsys_clk and rio_clk (reduce P&R on AMP from 40 minutes to 5 minutes :) 2015-04-11 21:32:46 +08:00
Florent Kermarrec 24b2bd7b6f soc/targets: use mem_map, fix addressing conflict on UP between ethernet and dds 2015-04-11 21:32:11 +08:00
Sebastien Bourdeauducq fb75bd246e targets/kc705: make AMP the default 2015-04-11 17:16:25 +08:00
Sebastien Bourdeauducq b492aad1c4 targets/kc705: enable Ethernet core 2015-04-10 13:15:32 +08:00
Sebastien Bourdeauducq 44304a33b2 soc,runtime: define RTIO FUD channel number in targets 2015-04-09 00:35:11 +08:00
Sebastien Bourdeauducq 7e591bb1c7 targets: use _Peripherals/UP/AMP class names, share QC1 IO defs 2015-04-07 00:07:53 +08:00
Sebastien Bourdeauducq 277e038569 targets/kc705: add LED on RTIO 2015-04-04 22:07:23 +08:00
Sebastien Bourdeauducq 5f7161a7de kc705: 16 TTLs 2015-04-03 15:57:25 +08:00
Florent Kermarrec 2995f0a705 remove use of _r prefix on CSRs 2015-04-02 18:30:44 +08:00
Sebastien Bourdeauducq 88a1707ef9 soc: use new location of gpio module 2015-04-02 17:19:00 +08:00
Sebastien Bourdeauducq 5fd7f68f48 targets/kc705: dual-CPU design 2015-04-02 16:53:57 +08:00
Sebastien Bourdeauducq 28bce9ee40 artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
Sebastien Bourdeauducq 4e5320be28 Merge branch 'master' of https://github.com/m-labs/artiq 2015-02-28 07:34:38 -07:00
Florent Kermarrec 9cf8db2f14 adapt code to MiSoC's changes 2015-02-28 07:34:11 -07:00
Joe Britton 0127de9bb5 soc: add_cpu_csr_region -> add_csr_region 2015-02-27 15:02:28 -07:00
Sebastien Bourdeauducq da917f768e initial kc705 support 2015-02-26 21:50:52 -07:00