Commit Graph

165 Commits

Author SHA1 Message Date
2838213457 fix language 2022-06-17 16:12:27 +08:00
2d0a866274 2238: add spec on max voltage with term
Updates #35.
Same termination structure as bnc/sma-ttl card.
Technically the max allowable voltage with termination is a bit higher than 5V.
But it seems that it will still exceed the termination resistor rating limit at 5.5V.
The only method of acquiring V_ds & other parameters is by eye-balling the I-V curve of the MOSFET, which is not precise.
So the calculation assumes V_ds=0, just to be conservative.
2022-06-17 16:07:21 +08:00
2964e13102 2118-2128: separate term rating to another spec 2022-06-17 16:06:26 +08:00
1cf6919ec8 add missing plot in b476c178 2022-06-17 13:34:56 +08:00
5c44a65d33 5568: init
There aren't any electrical specs, as suggested by the lack of electronic components.
There is a colored version of the connection diagram, but I think the B&W one actually looks better.
2022-06-16 16:02:47 +08:00
c1c078671b examples: move SPI examples to spi.py 2022-06-16 16:00:22 +08:00
9920661516 2245: add dio_spi examples 2022-06-13 17:27:32 +08:00
8ff606888c 2118-2128: add BNC-TTL front panels 2022-06-09 16:54:00 +08:00
8c2c9ecfe4 5108: mention possible SMA breakout option
Updates #13
2022-06-09 11:51:44 +08:00
11ee1ebcbd 5518-5528: init 2022-06-08 17:22:55 +08:00
b86eea7611 4410-4412: remove mention of external sync signal distribution
Updates #38
2022-06-08 17:21:27 +08:00
ac639b9d1e 2118-2128: add TTLClockGen example 2022-06-07 16:01:18 +08:00
9bd1412d9c 2118-2128: Add comment to make coarse RTIO cycle clear 2022-06-07 14:36:21 +08:00
2a5066ac5f 2118-2128: add <8ns short pulse example 2022-06-07 13:49:14 +08:00
f5ce9e19e9 4410-4412: add eem mode docs 2022-06-07 12:46:23 +08:00
fa0de2a72d 5108: add 'ADC' to title 2022-02-14 17:36:05 +08:00
2a9d7f4f9c 4456: clarify setup for the tests 2022-02-14 11:02:07 +08:00
75f3a328db 4456: dds -> pll 2022-02-14 10:38:28 +08:00
b476c178d0 2118-2128: add min pulse width spec
Especially test reuslt that validate the "minimum 3ns pulse width" claim.
2022-02-08 13:33:55 +08:00
3ed6a7ccbe 2118-2128: fix data rate spec
Quoted from the isolator datasheet: "Data rates up to 150 Mbps are supported."
Saying the maximum data rate is at least 150 Mbps is not very accurate.
Updates #36
2022-02-07 14:41:09 +08:00
d622423675 4456: remove mention to cpld cfg on rf_sw
As communication to ALmazny mezzanine does not use bitbang anymore, there is very little value for routing LVDS signal.
Also, MUXOUT readout from ADF5356 has an easily understandable API available.
So there should not be any reasons to use EEM[4:8] for anything other than controlling RF switches.
2022-02-07 14:28:07 +08:00
2ca8632582 4456: update attenuator API 2022-02-07 14:26:58 +08:00
6199e4bb5e 4456: fix quotation mark 2022-02-04 17:23:05 +08:00
1d7e6dc853 4456: init
Updates #17
2022-02-04 17:18:15 +08:00
d4387cae18 5108: fix d157dda
Made the spectrometer thing more stright forward. It really just monitors the laser power in that use case.
2022-02-04 14:59:30 +08:00
1b8beee45d 2118-2128: add max data rate spec
Base on the isolator datasheet, where it stated that "Data rates up to 150 Mbps are supported".
The electrical specific of the datasheet stated the spec differently.
Updates #36
2022-02-04 14:38:39 +08:00
7bdc121b6a 2118-2128: add low input min voltage
-0.5V from absolute rating
2022-02-04 14:31:30 +08:00
0b4ad6762e 2118-2128: add high input max voltage
5.5V from absolute rating
5V max with termination to respect 0.5W rating of the 50R resistor.
Updates #35
2022-02-04 14:01:22 +08:00
8864ecaf87 5432: fix card name
Updates #34
2022-02-04 13:49:10 +08:00
656068e151 4410-4412: fix card name
When the card no. is stated, mention the full name (e.g. 4410 DDS Urukul)
Updates #34
2022-02-04 13:45:28 +08:00
47e0c31705 ttl: update direction switches desc
Updates #33
2022-02-04 13:30:32 +08:00
d157dda863 5108: update applications 2022-02-04 13:10:31 +08:00
389b97d9e4 5108: make ADC-Repeaters-EEM path unidirectional
The only signal that enters the ADC through the repeaters is the SPI clock.
It is only a state/time reference, no meaning info goes through this path.
2022-01-31 16:39:24 +08:00
7ea24e32e9 su-servo: mention P1dB impact 2022-01-31 16:27:31 +08:00
2961557c0a 5108: desc of ARTIQ-PYTHON impact on sample rate 2022-01-31 15:37:46 +08:00
8159a63376 5108: fix terminology 2022-01-31 14:47:17 +08:00
7783b2311c 5108: reset to rev1 2022-01-31 14:46:38 +08:00
a30dd8ed95 su-servo: thicken the line on the plot
Should make the line more visible at 0.
Can always make it even thicker.
2022-01-31 14:45:21 +08:00
0bdf5d36bc fp pictures: png -> jpg
re-converted from source with optimization
2022-01-26 09:57:30 +08:00
ed78d7f217 add front panel pictures to MCX/LVDS-TTL
Using pdfs originated in the webpage drawings instead.
2022-01-25 15:54:28 +08:00
25e441b4ec fp: re-edit & change format to pdf
Updates #37.
2022-01-25 14:57:54 +08:00
3570028b72 5108: add missing example 2022-01-25 09:41:49 +08:00
ac198d0c52 5108: init Sampler
Closes #14.
2022-01-25 09:39:20 +08:00
5c77a735ed 4410: fix drawings
The previous one had some dimensions clipped.
2022-01-21 14:13:21 +08:00
9694b3b268 4410: fix front panel caption 2022-01-21 13:50:32 +08:00
18c7ab7166 5432: manually add BoM 2022-01-21 13:49:01 +08:00
a912e36662 4410-4412: remove old drawings 2022-01-21 13:32:21 +08:00
686f5b83cc 4410-4412: add BoM manually 2022-01-21 13:31:36 +08:00
df9078b897 2118-2128: add BoM manually
Updates #30.
2022-01-21 13:01:23 +08:00
5c962c64d4 5432: ditch import statement in python
Obviously, the import statements cannot be put right before the methods in the same indentation.
It was there because there wasn't a better way to put these code.
Now, it is replaced with an worded instruction that imports are needed.
2022-01-21 09:34:49 +08:00