Commit Graph

150 Commits

Author SHA1 Message Date
9e1f4a864c Merge branch 'master' into feature/mqtt-convert 2021-02-17 11:44:10 +01:00
b581a016ce lockin: redundant new 2021-02-14 17:55:01 +01:00
8918952b96 complex: lint 2021-02-12 12:06:00 +01:00
71c6e52f4d complex: add some traits 2021-02-12 12:03:53 +01:00
a6d4099ed3 lowpass: expose natural gain, add bias 2021-02-12 11:06:59 +01:00
67f052c0c9 lockin: add rounding bias 2021-02-12 11:05:50 +01:00
32b7058b47 lockin: 2nd order lowpass 2021-02-11 23:15:32 +01:00
b49f0a2eb9 complex: log2, update bins 2021-02-11 18:14:28 +01:00
3ae0b710bc lowpass: reimplement better 2021-02-11 14:30:05 +01:00
a144c099b2 lowpass: fmt 2021-02-10 14:10:28 +01:00
beeb43bf8b lowpass: robustify 2021-02-10 13:44:10 +01:00
8d68504026 lowpass: symmetric code 2021-02-10 13:31:41 +01:00
13b47556fd lowpass: clippy 2021-02-10 13:27:56 +01:00
30c2c2aac2 lowpass: i32, no multiplies 2021-02-10 11:39:19 +01:00
208ba8379a dsp, lockin: use cascaded 1st order lowpasses 2021-02-09 20:37:46 +01:00
31781a9d0e iir_int: rounding bias 2021-02-09 12:17:48 +01:00
473bdaa9bc iir_int: use f64 for extreme filters 2021-02-04 15:21:05 +01:00
f250e036ca rpll: simplify parameters, add one test 2021-02-04 12:46:33 +01:00
91f16c2961 Adding working example 2021-02-03 19:55:58 +01:00
913990d531 Merge remote-tracking branch 'origin/rj/bump-hal-smoltcp' into feature/mqtt-convert 2021-02-03 14:02:20 +01:00
dcc71d5d11 iir: tweak math a bit 2021-02-02 15:41:47 +01:00
f02d3cc95b dsp: clippy 2021-02-01 18:46:21 +01:00
2a84e3f299 dsp: remove unused code, let the compiler decide about inlining 2021-02-01 18:37:05 +01:00
5d7266abbc dsp: clippy 2021-02-01 18:24:51 +01:00
b6e22b576b iir: add const fn new() 2021-02-01 17:18:10 +01:00
ab7e3d229b rpll: clean up asserts 2021-02-01 16:01:05 +01:00
65a3f839a0 lockin: remove feed() 2021-02-01 13:42:38 +01:00
90bd4741cc dsp/benches: iir vec5 2021-02-01 13:27:49 +01:00
965c6335e1 dsp: fmt 2021-02-01 12:40:12 +01:00
7748d8eb54 dsp: constructor style 2021-02-01 12:37:44 +01:00
2c60103696 dsp: accu: add, iir: rename IIRState to Vec5 2021-02-01 12:23:47 +01:00
0fd4b167b4 complex/cossin: decouple modules 2021-02-01 12:07:03 +01:00
2d43b8970b lockin: cleanup 2021-01-31 20:49:14 +01:00
47089c267c dsp: align iir and iir_int, add iir micro benches 2021-01-31 19:12:24 +01:00
8408bc5811 dsp/bench: add pll/rpll micro benches 2021-01-31 18:54:09 +01:00
43342cef91 rpll: docs 2021-01-31 18:21:47 +01:00
d281783f2e rpll: reduce code 2021-01-31 18:10:13 +01:00
82c8fa1a07 rpll: extend tests 2021-01-31 17:10:03 +01:00
ab20d67a07 rpll: remove redundant time tracking 2021-01-31 13:42:15 +01:00
6b2d8169f0 rpll: more/cleaner tests 2021-01-31 13:25:01 +01:00
be7aad1b81 rpll: add unittest 2021-01-30 20:49:31 +01:00
0d1b237202 complex: richer API 2021-01-30 18:05:54 +01:00
b73286c188 Removing MQTT interface 2021-01-30 15:00:58 +01:00
e954ba3c52 Merge branch 'master' into feature/mqtt-convert 2021-01-30 14:48:54 +01:00
36288225b3 rpll: extend to above-nyquist frequencies 2021-01-28 22:21:42 +01:00
702ccc231d Using custom branch of miniconf 2021-01-27 18:15:35 +01:00
1749d48ca3 Revert "rpll: auto-align counter"
This reverts commit dbacc5293e12f712fef7bd85848e1b0bd8fde823.
2021-01-27 09:01:07 +01:00
45e7d6de3c rpll: auto-align counter 2021-01-27 09:01:07 +01:00
7c1fa9695a iir lowpass: f32 is sufficient 2021-01-26 19:37:05 +01:00
73c98c947a iir_int: remove spurious note 2021-01-26 19:23:23 +01:00