Robert Jördens
|
bf5f6afbc1
|
fix bench
|
2021-04-14 16:02:54 +02:00 |
Robert Jördens
|
b2d6b5c10c
|
dsp/bench: fmt
|
2021-02-27 15:02:16 +01:00 |
Robert Jördens
|
f4c6e07a38
|
dsp/bench: add lowpass
|
2021-02-27 14:54:46 +01:00 |
Ryan Summers
|
28db428829
|
Fixing bench tests
|
2021-02-19 11:02:46 +01:00 |
Ryan Summers
|
c6ef78cdc5
|
Pulling back easybench changes
|
2021-02-19 10:44:46 +01:00 |
Robert Jördens
|
9983fad041
|
dsp: use num
|
2021-02-18 14:07:43 +01:00 |
Robert Jördens
|
90bd4741cc
|
dsp/benches: iir vec5
|
2021-02-01 13:27:49 +01:00 |
Robert Jördens
|
47089c267c
|
dsp: align iir and iir_int, add iir micro benches
|
2021-01-31 19:12:24 +01:00 |
Robert Jördens
|
8408bc5811
|
dsp/bench: add pll/rpll micro benches
|
2021-01-31 18:54:09 +01:00 |
Robert Jördens
|
eea5033d36
|
dsp bench: fix
|
2021-01-22 11:38:38 +01:00 |
Matt Huszagh
|
3125365a15
|
add atan2 host benchmark
|
2020-12-17 14:01:57 -08:00 |
Matt Huszagh
|
2ddaab8fae
|
dsp: fix bench import path
|
2020-12-16 16:57:18 -08:00 |
Matt Huszagh
|
7c4f608206
|
move cossin and atan2 into the same trig file
|
2020-12-16 16:26:44 -08:00 |
Robert Jördens
|
d271dccaba
|
cossin bench: be fair to glibc
|
2020-12-11 19:08:11 +01:00 |
Robert Jördens
|
d4fceea5d1
|
cossin: bench against (i32 as f32).sin_cos()
|
2020-12-11 17:26:50 +01:00 |
Robert Jördens
|
5cd93d3318
|
fmt
|
2020-12-11 17:08:16 +01:00 |
Robert Jördens
|
a85738a651
|
dsp: add host benchmark
|
2020-12-11 15:19:13 +01:00 |