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Merge branch 'feature/hal-update' into feature/livestream

master
Ryan Summers 2021-06-15 12:46:41 +02:00
parent 5a947e459c 9e182c850b
commit b912f0c387
3 changed files with 34 additions and 22 deletions
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2
Cargo.lock generated
View File

@ -812,7 +812,7 @@ dependencies = [
[[package]] [[package]]
name = "stm32h7xx-hal" name = "stm32h7xx-hal"
version = "0.9.0" version = "0.9.0"
source = "git+https://github.com/quartiq/stm32h7xx-hal.git?rev=b0b8a93#b0b8a930b2c3bc5fcebc2e905b4c5e13360111a5" source = "git+https://github.com/quartiq/stm32h7xx-hal.git?rev=acd47be#acd47beb4b84b4dc46da3a8b68688bc8c5984604"
dependencies = [ dependencies = [
"bare-metal 1.0.0", "bare-metal 1.0.0",
"cast", "cast",

2
Cargo.toml
View File

@ -57,7 +57,7 @@ rev = "70b0eb5"
features = ["stm32h743v", "rt", "unproven", "ethernet", "quadspi"] features = ["stm32h743v", "rt", "unproven", "ethernet", "quadspi"]
# version = "0.9.0" # version = "0.9.0"
git = "https://github.com/quartiq/stm32h7xx-hal.git" git = "https://github.com/quartiq/stm32h7xx-hal.git"
rev = "b0b8a93" rev = "acd47be"
# link.x section start/end # link.x section start/end
[patch.crates-io.cortex-m-rt] [patch.crates-io.cortex-m-rt]

52
src/hardware/setup.rs
View File

@ -359,7 +359,7 @@ pub fn setup(
.pb10 .pb10
.into_alternate_af5() .into_alternate_af5()
.set_speed(hal::gpio::Speed::VeryHigh); .set_speed(hal::gpio::Speed::VeryHigh);
let _spi_nss = gpiob let spi_nss = gpiob
.pb9 .pb9
.into_alternate_af5() .into_alternate_af5()
.set_speed(hal::gpio::Speed::VeryHigh); .set_speed(hal::gpio::Speed::VeryHigh);
@ -368,13 +368,16 @@ pub fn setup(
polarity: hal::spi::Polarity::IdleHigh, polarity: hal::spi::Polarity::IdleHigh,
phase: hal::spi::Phase::CaptureOnSecondTransition, phase: hal::spi::Phase::CaptureOnSecondTransition,
}) })
.manage_cs() .inter_word_delay(design_parameters::ADC_SETUP_TIME)
.suspend_when_inactive() .hardware_cs(hal::spi::HardwareCS {
.communication_mode(hal::spi::CommunicationMode::Receiver) mode: hal::spi::HardwareCSMode::WordTransaction,
.cs_delay(design_parameters::ADC_SETUP_TIME); assertion_delay: design_parameters::ADC_SETUP_TIME,
polarity: hal::spi::Polarity::IdleHigh,
})
.communication_mode(hal::spi::CommunicationMode::Receiver);
let spi: hal::spi::Spi<_, _, u16> = device.SPI2.spi( let spi: hal::spi::Spi<_, _, u16> = device.SPI2.spi(
(spi_sck, spi_miso, hal::spi::NoMosi), (spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
config, config,
design_parameters::ADC_DAC_SCK_MAX, design_parameters::ADC_DAC_SCK_MAX,
ccdr.peripheral.SPI2, ccdr.peripheral.SPI2,
@ -400,7 +403,7 @@ pub fn setup(
.pc10 .pc10
.into_alternate_af6() .into_alternate_af6()
.set_speed(hal::gpio::Speed::VeryHigh); .set_speed(hal::gpio::Speed::VeryHigh);
let _spi_nss = gpioa let spi_nss = gpioa
.pa15 .pa15
.into_alternate_af6() .into_alternate_af6()
.set_speed(hal::gpio::Speed::VeryHigh); .set_speed(hal::gpio::Speed::VeryHigh);
@ -409,13 +412,16 @@ pub fn setup(
polarity: hal::spi::Polarity::IdleHigh, polarity: hal::spi::Polarity::IdleHigh,
phase: hal::spi::Phase::CaptureOnSecondTransition, phase: hal::spi::Phase::CaptureOnSecondTransition,
}) })
.manage_cs() .inter_word_delay(design_parameters::ADC_SETUP_TIME)
.suspend_when_inactive() .hardware_cs(hal::spi::HardwareCS {
.communication_mode(hal::spi::CommunicationMode::Receiver) mode: hal::spi::HardwareCSMode::WordTransaction,
.cs_delay(design_parameters::ADC_SETUP_TIME); assertion_delay: design_parameters::ADC_SETUP_TIME,
polarity: hal::spi::Polarity::IdleHigh,
})
.communication_mode(hal::spi::CommunicationMode::Receiver);
let spi: hal::spi::Spi<_, _, u16> = device.SPI3.spi( let spi: hal::spi::Spi<_, _, u16> = device.SPI3.spi(
(spi_sck, spi_miso, hal::spi::NoMosi), (spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
config, config,
design_parameters::ADC_DAC_SCK_MAX, design_parameters::ADC_DAC_SCK_MAX,
ccdr.peripheral.SPI3, ccdr.peripheral.SPI3,
@ -451,7 +457,7 @@ pub fn setup(
.pe2 .pe2
.into_alternate_af5() .into_alternate_af5()
.set_speed(hal::gpio::Speed::VeryHigh); .set_speed(hal::gpio::Speed::VeryHigh);
let _spi_nss = gpioe let spi_nss = gpioe
.pe4 .pe4
.into_alternate_af5() .into_alternate_af5()
.set_speed(hal::gpio::Speed::VeryHigh); .set_speed(hal::gpio::Speed::VeryHigh);
@ -460,13 +466,16 @@ pub fn setup(
polarity: hal::spi::Polarity::IdleHigh, polarity: hal::spi::Polarity::IdleHigh,
phase: hal::spi::Phase::CaptureOnSecondTransition, phase: hal::spi::Phase::CaptureOnSecondTransition,
}) })
.manage_cs() .hardware_cs(hal::spi::HardwareCS {
.suspend_when_inactive() mode: hal::spi::HardwareCSMode::WordTransaction,
assertion_delay: 0.0,
polarity: hal::spi::Polarity::IdleHigh,
})
.communication_mode(hal::spi::CommunicationMode::Transmitter) .communication_mode(hal::spi::CommunicationMode::Transmitter)
.swap_mosi_miso(); .swap_mosi_miso();
device.SPI4.spi( device.SPI4.spi(
(spi_sck, spi_miso, hal::spi::NoMosi), (spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
config, config,
design_parameters::ADC_DAC_SCK_MAX, design_parameters::ADC_DAC_SCK_MAX,
ccdr.peripheral.SPI4, ccdr.peripheral.SPI4,
@ -483,7 +492,7 @@ pub fn setup(
.pf7 .pf7
.into_alternate_af5() .into_alternate_af5()
.set_speed(hal::gpio::Speed::VeryHigh); .set_speed(hal::gpio::Speed::VeryHigh);
let _spi_nss = gpiof let spi_nss = gpiof
.pf6 .pf6
.into_alternate_af5() .into_alternate_af5()
.set_speed(hal::gpio::Speed::VeryHigh); .set_speed(hal::gpio::Speed::VeryHigh);
@ -492,13 +501,16 @@ pub fn setup(
polarity: hal::spi::Polarity::IdleHigh, polarity: hal::spi::Polarity::IdleHigh,
phase: hal::spi::Phase::CaptureOnSecondTransition, phase: hal::spi::Phase::CaptureOnSecondTransition,
}) })
.manage_cs() .hardware_cs(hal::spi::HardwareCS {
mode: hal::spi::HardwareCSMode::WordTransaction,
assertion_delay: 0.0,
polarity: hal::spi::Polarity::IdleHigh,
})
.communication_mode(hal::spi::CommunicationMode::Transmitter) .communication_mode(hal::spi::CommunicationMode::Transmitter)
.suspend_when_inactive()
.swap_mosi_miso(); .swap_mosi_miso();
device.SPI5.spi( device.SPI5.spi(
(spi_sck, spi_miso, hal::spi::NoMosi), (spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
config, config,
design_parameters::ADC_DAC_SCK_MAX, design_parameters::ADC_DAC_SCK_MAX,
ccdr.peripheral.SPI5, ccdr.peripheral.SPI5,