diff --git a/Cargo.lock b/Cargo.lock
index 6f2b652..e6127f2 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -812,7 +812,7 @@ dependencies = [
 [[package]]
 name = "stm32h7xx-hal"
 version = "0.9.0"
-source = "git+https://github.com/quartiq/stm32h7xx-hal.git?rev=b0b8a93#b0b8a930b2c3bc5fcebc2e905b4c5e13360111a5"
+source = "git+https://github.com/quartiq/stm32h7xx-hal.git?rev=acd47be#acd47beb4b84b4dc46da3a8b68688bc8c5984604"
 dependencies = [
  "bare-metal 1.0.0",
  "cast",
diff --git a/Cargo.toml b/Cargo.toml
index 3e6b93c..30d0d5e 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -57,7 +57,7 @@ rev = "70b0eb5"
 features = ["stm32h743v", "rt", "unproven", "ethernet", "quadspi"]
 # version = "0.9.0"
 git = "https://github.com/quartiq/stm32h7xx-hal.git"
-rev = "b0b8a93"
+rev = "acd47be"
 
 # link.x section start/end
 [patch.crates-io.cortex-m-rt]
diff --git a/src/hardware/setup.rs b/src/hardware/setup.rs
index 8436bf0..4381e40 100644
--- a/src/hardware/setup.rs
+++ b/src/hardware/setup.rs
@@ -359,7 +359,7 @@ pub fn setup(
                 .pb10
                 .into_alternate_af5()
                 .set_speed(hal::gpio::Speed::VeryHigh);
-            let _spi_nss = gpiob
+            let spi_nss = gpiob
                 .pb9
                 .into_alternate_af5()
                 .set_speed(hal::gpio::Speed::VeryHigh);
@@ -368,13 +368,16 @@ pub fn setup(
                 polarity: hal::spi::Polarity::IdleHigh,
                 phase: hal::spi::Phase::CaptureOnSecondTransition,
             })
-            .manage_cs()
-            .suspend_when_inactive()
-            .communication_mode(hal::spi::CommunicationMode::Receiver)
-            .cs_delay(design_parameters::ADC_SETUP_TIME);
+            .inter_word_delay(design_parameters::ADC_SETUP_TIME)
+            .hardware_cs(hal::spi::HardwareCS {
+                mode: hal::spi::HardwareCSMode::WordTransaction,
+                assertion_delay: design_parameters::ADC_SETUP_TIME,
+                polarity: hal::spi::Polarity::IdleHigh,
+            })
+            .communication_mode(hal::spi::CommunicationMode::Receiver);
 
             let spi: hal::spi::Spi<_, _, u16> = device.SPI2.spi(
-                (spi_sck, spi_miso, hal::spi::NoMosi),
+                (spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
                 config,
                 design_parameters::ADC_DAC_SCK_MAX,
                 ccdr.peripheral.SPI2,
@@ -400,7 +403,7 @@ pub fn setup(
                 .pc10
                 .into_alternate_af6()
                 .set_speed(hal::gpio::Speed::VeryHigh);
-            let _spi_nss = gpioa
+            let spi_nss = gpioa
                 .pa15
                 .into_alternate_af6()
                 .set_speed(hal::gpio::Speed::VeryHigh);
@@ -409,13 +412,16 @@ pub fn setup(
                 polarity: hal::spi::Polarity::IdleHigh,
                 phase: hal::spi::Phase::CaptureOnSecondTransition,
             })
-            .manage_cs()
-            .suspend_when_inactive()
-            .communication_mode(hal::spi::CommunicationMode::Receiver)
-            .cs_delay(design_parameters::ADC_SETUP_TIME);
+            .inter_word_delay(design_parameters::ADC_SETUP_TIME)
+            .hardware_cs(hal::spi::HardwareCS {
+                mode: hal::spi::HardwareCSMode::WordTransaction,
+                assertion_delay: design_parameters::ADC_SETUP_TIME,
+                polarity: hal::spi::Polarity::IdleHigh,
+            })
+            .communication_mode(hal::spi::CommunicationMode::Receiver);
 
             let spi: hal::spi::Spi<_, _, u16> = device.SPI3.spi(
-                (spi_sck, spi_miso, hal::spi::NoMosi),
+                (spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
                 config,
                 design_parameters::ADC_DAC_SCK_MAX,
                 ccdr.peripheral.SPI3,
@@ -451,7 +457,7 @@ pub fn setup(
                 .pe2
                 .into_alternate_af5()
                 .set_speed(hal::gpio::Speed::VeryHigh);
-            let _spi_nss = gpioe
+            let spi_nss = gpioe
                 .pe4
                 .into_alternate_af5()
                 .set_speed(hal::gpio::Speed::VeryHigh);
@@ -460,13 +466,16 @@ pub fn setup(
                 polarity: hal::spi::Polarity::IdleHigh,
                 phase: hal::spi::Phase::CaptureOnSecondTransition,
             })
-            .manage_cs()
-            .suspend_when_inactive()
+            .hardware_cs(hal::spi::HardwareCS {
+                mode: hal::spi::HardwareCSMode::WordTransaction,
+                assertion_delay: 0.0,
+                polarity: hal::spi::Polarity::IdleHigh,
+            })
             .communication_mode(hal::spi::CommunicationMode::Transmitter)
             .swap_mosi_miso();
 
             device.SPI4.spi(
-                (spi_sck, spi_miso, hal::spi::NoMosi),
+                (spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
                 config,
                 design_parameters::ADC_DAC_SCK_MAX,
                 ccdr.peripheral.SPI4,
@@ -483,7 +492,7 @@ pub fn setup(
                 .pf7
                 .into_alternate_af5()
                 .set_speed(hal::gpio::Speed::VeryHigh);
-            let _spi_nss = gpiof
+            let spi_nss = gpiof
                 .pf6
                 .into_alternate_af5()
                 .set_speed(hal::gpio::Speed::VeryHigh);
@@ -492,13 +501,16 @@ pub fn setup(
                 polarity: hal::spi::Polarity::IdleHigh,
                 phase: hal::spi::Phase::CaptureOnSecondTransition,
             })
-            .manage_cs()
+            .hardware_cs(hal::spi::HardwareCS {
+                mode: hal::spi::HardwareCSMode::WordTransaction,
+                assertion_delay: 0.0,
+                polarity: hal::spi::Polarity::IdleHigh,
+            })
             .communication_mode(hal::spi::CommunicationMode::Transmitter)
-            .suspend_when_inactive()
             .swap_mosi_miso();
 
             device.SPI5.spi(
-                (spi_sck, spi_miso, hal::spi::NoMosi),
+                (spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
                 config,
                 design_parameters::ADC_DAC_SCK_MAX,
                 ccdr.peripheral.SPI5,